Patent classifications
H10F71/1276
METHODS OF GROWING HETEROEPITAXIAL SINGLE CRYSTAL OR LARGE GRAINED SEMICONDUCTOR FILMS AND DEVICES THEREON
A method is provided for making smooth crystalline semiconductor thin-films and hole and electron transport films for solar cells and other electronic devices. Such semiconductor films have an average roughness of 3.4 nm thus allowing for effective deposition of additional semiconductor film layers such as perovskites for tandem solar cell structures which require extremely smooth surfaces for high quality device fabrication.
Textured metallic back reflector
Embodiments of the invention generally relate to device fabrication of thin films used as solar devices or other electronic devices, and include textured back reflectors utilized in solar applications. In one embodiment, a method for forming a textured metallic back reflector which includes depositing a metallic layer on a gallium arsenide material within a thin film stack, forming an array of metallic islands from the metallic layer during an annealing process, removing or etching material from the gallium arsenide material to form apertures between the metallic islands, and depositing a metallic reflector layer to fill the apertures and cover the metallic islands. In another embodiment, a textured metallic back reflector includes an array of metallic islands disposed on a gallium arsenide material, a plurality of apertures disposed between the metallic islands and extending into the gallium arsenide material, a metallic reflector layer disposed over the metallic islands, and a plurality of reflector protrusions formed between the metallic islands and extending from the metallic reflector layer and into the apertures formed in the gallium arsenide material.
Radiation and temperature hard multi-pixel avalanche photodiodes
The structure and method of fabricating a radiation and temperature hard avalanche photodiode with integrated radiation and temperature hard readout circuit, comprising a substrate, an avalanche region, an absorption region, and a plurality of Ohmic contacts are presented. The present disclosure provides for tuning of spectral sensitivity and high device efficiency, resulting in photon counting capability with decreased crosstalk and reduced dark current.
Nitride semiconductor device
An nitride semiconductor device for the improvement of lower operational voltage or increased emitting output, comprises an active layer comprising quantum well layer or layers and barrier layer or layers between n-type nitride. semiconductor layers and p-type nitride semiconductor layers, wherein said quantum layer in said active layer comprises InxGa1xN (0<x<1) having a peak wavelength of 450 to 540 nm and said active layer comprises laminating layers of 9 to 13, in which at most 3 layers from the side of said n-type nitride semiconductor layers are doped with an n-type impurity selected from the group consisting of Si, Ge and Sn in a range of 510.sup.16 to 210.sup.18/cm.sup.3.
Method for producing an optoelectronic semiconductor component and optoelectronic semiconductor component
A method for producing an optoelectronic semiconductor component having a plurality of image points and an optoelectronic component are disclosed. In an embodiment the method includes providing a semiconductor layer sequence including an n-conducting semiconductor layer, an active zone, and a p-conducting semiconductor layer; applying a first layer sequence, wherein the first layer sequence is divided into a plurality of regions which are arranged laterally spaced with respect to each other on a top surface of the p-conducting semiconductor layer; c) applying a second insulating layer; partially removing the p-conducting semiconductor layer and the active zone, in such a way that the n-conducting semiconductor layer is exposed at points and the p-conducting semiconductor layer is divided into individual regions which are laterally spaced with respect to each other, wherein each of the regions comprises a part of the p-conducting semiconductor layer and a part of the active zone.
Methods for Producing Composite GaN Nanocolumns and Light Emitting Structures Made from the Methods
A method for growing on a substrate strongly aligned uniform cross-section semiconductor composite nanocolumns is disclosed. The method includes: (a) forming faceted pyramidal pits on the substrate surface; (b) initiating nucleation on the facets of the pits; and; (c) promoting the growth of nuclei toward the center of the pits where they coalesce with twinning and grow afterwards together as composite nanocolumns. Multi-quantum-well, core-shell nanocolumn heterostructures can be grown on the sidewalls of the nanocolumns. Furthermore, a continuous semiconductor epitaxial layer can be formed through the overgrowth of the nanocolumns to facilitate fabrication of high-quality planar device structures or for light emitting structures.
Transducer to convert optical energy to electrical energy
A transducer to convert optical energy to electrical energy. The transducer or photo-transducer has a base layer which has a group of connecting elements formed therein at separations which are increasing with the distance away from an emitter layer formed atop the base layer. The connecting elements separate and electrically connect the base layer into base segments, the base segments having increasing thicknesses with the distance away from the emitter layer. The photo-transducer generates an output voltage that is greater than the input light photovoltage. The photo-transducer output voltage is proportional to the number of connecting elements formed in the base layer.
NANOWIRE-BASED SOLAR CELL STRUCTURE
The solar cell structure according to the present invention comprises a nanowire (205) that constitutes the light absorbing part of the solar cell structure and a passivating shell (209) that encloses at least a portion of the nanowire (205). In a first aspect of the invention, the passivating shell (209) of comprises a light guiding shell (210), which preferably has a high- and indirect bandgap to provide light guiding properties. In a second aspect of the invention, the solar cell structure comprises a plurality of nanowires which are positioned with a maximum spacing between adjacent nanowires which is shorter than the wavelength of the light which the solar cell structure is intended to absorbing order to provide an effective medium for light absorption. Thanks to the invention it is possible to provide high efficiency solar cell structures.
HIGH-SENSITIVITY AVALANCHE PHOTODETECTORS
Disclosed herein are avalanche photodiodes (APDs) particularly useful for high-sensitivity Geiger-mode APDs formed using an array of micro-cells. The photodetector is formed on a semiconductor substrate of indium phosphide (InP) having epitaxial layers, including indium gallium arsenide (InGaAs) as the photodetecting layer, with n-doped InP to one side, and layers of InP incorporating p-doped regions on the opposite side. The p-doped regions may serve to define an array of micro-cells, which may be arranged in a hexagonal pattern. A well may be etched through the epitaxial structures, allowing an electrode that contacts the n-doped InP layer and another that contacts the p-doped InP regions to be patterned on the same side of the detector. Flip-chip bonding techniques can then attach the semiconductor wafer to a stronger support substrate, which may additionally be configured with electronic circuitry positioned to electrically contact the electrodes on the semiconductor wafer surface.
OPTOELECTRONICS AND CMOS INTEGRATION ON GOI SUBSTRATE
A single chip including an optoelectronic device on the semiconductor layer in a first region, the optoelectronic device comprises a bottom cladding layer, an active region, and a top cladding layer, wherein the bottom cladding layer is above and in direct contact with the semiconductor layer, the active region is above and in direct contact with the bottom cladding layer, and the top cladding layer is above and in direct contact with the active region, a silicon device on the substrate extension layer in a second region, a device insulator layer substantially covering both the optoelectronic device in the first region and the silicon device in the second region, and a waveguide embedded within the device insulator layer in direct contact with a sidewall of the active region of the optoelectronic device.