Improvement of pixel characteristics is achieved. A light detecting device includes a semiconductor layer and first and second separation areas disposed in the semiconductor layer. The first separation area includes an insulating film that fills a first dug part extending in a thickness direction of the semiconductor layer and of which a refractive index is lower than that of the semiconductor layer, and the second separation area includes a conductive film filling a second dug part extending in the thickness direction of the semiconductor layer.

A light-receiving device of an embodiment of the disclosure includes: a semiconductor substrate including a light-receiving region with light-receiving elements arranged two-dimensionally in matrix, and a peripheral region provided therearound; a first first electrically-conductive region provided at an interface of a first surface of the semiconductor substrate for each element and coupled to a first electrode, in the light-receiving region; a second first electrically-conductive region provided around the first first region provided for each element and coupled to a second electrode, at the interface; a third first electrically-conductive region provided around the second first region provided for each element and having electrically floating state, at the interface;

a fourth first electrically-conductive region provided at the interface around the light-receiving region and having electrically floating state, in the peripheral region; and a first second electrically-conductive region embeddedly formed in the semiconductor substrate and facing the second, third, and fourth first regions.

A semiconductor device capable of realizing a capacitative element of which a capacitance value has low bias dependence and of which capacitance density is high without lowering operating voltage is provided. The semiconductor device includes: a semiconductor substrate; a first capacitative element stacked on the semiconductor substrate; and a second capacitative element which is stacked on an opposite side to a side of the semiconductor substrate of the first capacitative element and of which a capacitance value has bias characteristics being opposite to bias characteristics of a capacitance value of the first capacitative element, wherein the first capacitative element and the second capacitative element are connected in parallel.

Disclosed are image sensors and methods of fabricating the same. The image sensor includes a semiconductor substrate including a pixel zone and a pad zone and having a first surface and a second surface opposing each other, a first pad separation pattern on the pad zone and extending from the first surface of the semiconductor substrate toward the second surface of the semiconductor substrate, a second pad separation pattern extending from the second surface toward the first surface of the semiconductor substrate on the pad zone the second pad and in contact with the first pad separation pattern, and a pixel separation pattern on the pixel zone and extending from the second surface of the semiconductor substrate toward the first surface of the semiconductor substrate.

A CMOS imaging sensor structure and a manufacturing method therefor. The CMOS imaging sensor structure comprises a pixel unit of the CMOS imaging sensor set on a semiconductor substrate, the pixel unit comprises a circuit device region and a first photosensitive region, the circuit device region is set on the frontside of the semiconductor substrate, the first photosensitive region is set correspondingly in the semiconductor substrate below the circuit device region, the circuit device region is isolated from the first photosensitive region by an isolation region, and the circuit device region is electrical connected with the first photosensitive region through a conductive trench, a fill factor of a photosensitive region is increased, and performances of a reading circuit is increased by a more optimized design scheme. A second photosensitive region of the pixel unit can also be set on the semiconductor substrate on a side of the circuit device region, thus a larger photosensitive region can be formed together with the first photosensitive region. The present invention also provides a manufacturing method for the CMOS imaging sensor structure.

A radiation detector for position-resolved detection of radiation comprises at least one sensor tile with sensor material sensitive to the radiation. The sensor tile defines a horizontal plane spanned by a first axis and a second axis orthogonal to the first axis. A set of sensor pixels of electrically conductive material is arranged in the horizontal plane and in contact with the sensor material. The set comprises a subset of inner sensor pixels, wherein an inner sensor pixel has a neighbor sensor pixel in each direction of the first axis and the second axis. At least two neighboring inner sensor pixels of the subset show an extension along the second axis that exceeds an extension along the first axis. The radiation detector further comprises at least one readout chip assigned to the at least one sensor tile and extending along the first axis and the second axis.

An imaging element includes a first substrate provided with a photoelectric conversion portion that photoelectrically converts light and generates charge, and a readout circuit that outputs a signal based on the charge generated by the photoelectric conversion portion, a second substrate laminated on the first substrate and provided with a processing portion that processes the signal output from the readout circuit, and a connection portion provided with a bent portion bending in a portion other than the vicinity of the first substrate and the second substrate, and electrically connecting the readout circuit to the processing portion.

To improve characteristics in a semiconductor apparatus manufactured from a wafer shared in a plurality of manufacturing processes. A semiconductor apparatus includes an opening for a pad, a wiring layer, and a dummy pattern. In the semiconductor apparatus, the opening for a pad is formed on a front surface of a substrate. In addition, in the semiconductor apparatus, a predetermined electrode pad is provided in the opening for a pad. In the semiconductor apparatus, a front surface-side wiring layer is formed in the substrate. In the semiconductor apparatus, a dummy pattern is formed around a dummy non-forming region penetrating up to the front surface-side wiring layer from a rear surface relative to the front surface.

To reduce an impact due to dry etching performed when a via is formed in a substrate. A first base substrate includes first and second semiconductor substrates. A pixel region is formed on the first semiconductor substrate. A logic circuit that processes a pixel signal output from the pixel region is formed on the second semiconductor substrate. The first base substrate includes a first via that passes through a wiring layer of the logic circuit to a back surface of the first base substrate. A second base substrate includes a connection portion and a second via. The connection portion is connected to the first via of the first base substrate on a front surface of the second base substrate. The connection portion and an electrode situated in a lowest surface of the second base substrate are electrically connected to each other through the second via using a conductive material.

A light deflecting device and a distance measuring device in which spread of emission light is suppressed and an effective opening for light reception is enlarged are provided.

A light deflecting device including a plurality of waveguides that extends in a first direction in parallel to each other and is provided in a semiconductor layer, and is capable of emitting light to an external space of the semiconductor layer and receiving light from the external space, and an optical system that is provided on a substrate including the semiconductor layer and converts light deflected and emitted from the plurality of waveguides in the first direction into a light beam substantially parallel to a second direction orthogonal to the first direction.