An imaging device that includes a substrate, a photoelectric conversion section disposed in the substrate, an element isolation region disposed adjacent to the photoelectric conversion section, a floating diffusion electrically connected to the photoelectric conversion section, an amplification transistor having a gate electrode and an active region, and a contact section disposed on the gate electrode of the amplification transistor. The contact section overlaps the active region of the amplification transistor. The floating diffusion is electrically connected to the gate electrode of the amplification transistor via the contact section. The width of the gate electrode of the amplification transistor is larger than a width of the active region of the amplification transistor. The photoelectric conversion section includes a first type impurity, and the element isolation region includes a second type impurity having a conductivity opposite to the first type impurity.

An image sensor is disclosed. The image sensor includes a pixel array including a plurality of pixel units, a controller configured to drive the pixel array, and an analog-digital conversion block configured to convert a sensing signal output from the pixel array to a digital signal, wherein each of the pixel units includes a photodiode and a plurality of transistors on a semiconductor substrate, each of the transistors includes a gate electrode and a gate dielectric layer, each gate dielectric having a thickness, and the thickness of at least one of the gate dielectric layers is different from the thickness of at least one of the other gate dielectric layers.

A gate electrode of a field effect transistor is formed. Next, an offset spacer film with a double-layer structure including a silicon oxide film as a lower-layer film and a silicon nitride film as an upper-layer film is formed on a sidewall surface of the gate electrode. The silicon nitride film serves as a supply source of an element for terminating dangling bonds of silicon in a device formation region. Next, treatment for leaving the offset spacer film intact or treatment for removing the silicon nitride film of the offset spacer film is performed. Thereafter, a sidewall insulating film is formed on the sidewall surface of the gate electrode.

A pixel circuit comprising a photodiode, a floating diffusion, a transfer gate for electrically connecting the photodiode to the floating diffusion, and a charge storage device, wherein the charge storage device comprises an electrode which is at least partly overlaying the photodiode, and which is configured and adapted to be driven so as to influence the total capacitance of the pixel.

With an image sensor in which the amplifier circuit is disposed at each pixel, there is such an issue that the threshold voltage of the transistor fluctuates so that the signal voltage fluctuates because a voltage is continuously applied between the source and the gate of the transistor at all times when using the amorphous thin film semiconductor as the transistor that constitutes an amplifier circuit. The gate-source potential of the TFT that constitutes the amplifier circuit is controlled so that the gate terminal voltage becomes smaller than the source terminal voltage in an integrating period where the pixels accumulate the signals, and controlled so that the gate terminal voltage becomes larger than the source terminal voltage in a readout period where the pixels output the signals.

A TFT and manufacturing method thereof, an array substrate and manufacturing method thereof, an X-ray detector and a display device are disclosed. The manufacturing method includes: forming a gate-insulating-layer thin film (3), a semiconductor-layer thin film (4) and a passivation-shielding-layer thin film (5) successively; forming a pattern (5) that includes a passivation shielding layer through one patterning process, so that a portion, sheltered by the passivation shielding layer, of the semiconductor-layer thin film forms a pattern of an active layer (4a); and performing an ion doping process to a portion, not sheltered by the passivation shielding layer, of the semiconductor-layer thin film to form a pattern comprising a source electrode (4c) and a drain electrode (4b). The source electrode (4c) and the drain electrode (4b) are disposed on two sides of the active layer (4a) respectively and in a same layer as the active layer (4a). The manufacturing method can reduce the number of patterning processes and improve the performance of the thin film transistor in the array substrate.

An image pickup apparatus capable of obtaining focusing information at the time of photometry for emission control and of controlling an emission quantity appropriately. An image pickup device receives a pair of light beams that pass through different pupil division areas of an imaging optical system with a pair of photoelectric conversion sections. An extraction unit extracts candidates from a pre-emission image. A calculation unit finds focused areas and defocus areas in the pre-emission image. A selection unit selects a light-control target area from the candidates according to information about the focused areas. A control unit controls emission quantity so that luminance in the light-control target area becomes predetermined luminance. The calculation unit finds the information about the focused areas based on difference information between a first phase difference signal read from one photoelectric conversion section and a second phase difference signal read from the other photoelectric conversion section.

A semiconductor device includes a substrate, a logic gate structure, a photosensitive gate structure, a hard mask layer, a first spacer, a first source, a first drain, a second spacer, a second source and a second drain. The logic gate structure and the photosensitive gate structure are disposed on a surface of the substrate. The hard mask layer covers the logic gate structure, the photosensitive gate structure and the surface of the substrate. The first spacer overlies the hard mask layer conformal to a sidewall of the logic gate structure. The first source and drain are respectively disposed in the substrate at two opposite sides of the logic gate structure. The second spacer overlies the hard mask layer conformal to a sidewall of the photosensitive gate structure. The second source and drain are respectively disposed in the substrate at two opposite sides of the photosensitive gate structure.

A solid-state image sensor includes: a pixel array that includes first pixels, each having first and second photoelectric conversion units, and second pixels, each having third and fourth photoelectric conversion units; first to fourth transfer gates via which a signal charge respectively generated in the first to fourth photoelectric conversion units is respectively transferred to first to fourth charge voltage conversion units. At least one of a gate width, a gate length and an installation position of at least one transfer gate among the first to fourth transfer gates is altered to achieve uniformity in voltage conversion efficiency at the first to fourth charge voltage conversion units.

An image sensor includes a photoelectric conversion element, including a first impurity region and a second impurity region, wherein the first impurity region contacts a first surface of a substrate, wherein the second impurity region has conductivity complementary to the first impurity region and is formed in the substrate and below the first impurity region; a pillar formed over the photoelectric conversion element; a transfer gate formed over the photoelectric conversion element to surround the pillar; and a channel layer formed between the transfer gate and the pillar and contacting the photoelectric conversion element, wherein the channel layer contacts the first impurity region and has the same conductivity as the second impurity region.