A method for manufacturing a semiconductor device includes forming a fin structure including a well layer, an oxide layer disposed over the well layer and a channel layer disposed over the oxide layer. An isolation insulating layer is formed so that the channel layer of the fin structure protrudes from the isolation insulating layer and a part of or an entirety of the oxide layer is embedded in the isolation insulating layer. A gate structure is formed over the fin structure. A recessed portion is formed by etching a part of the fin structure not covered by the gate structure such that the oxide layer is exposed. A recess is formed in the exposed oxide layer. An epitaxial seed layer in the recess in the oxide layer. An epitaxial layer is formed in and above the recessed portion. The epitaxial layer is in contact with the epitaxial seed layer.

A method for fabricating an enhancement-mode n-type field effect transistor is disclosed. The method involves forming a metal oxide channel layer, forming a gate dielectric layer, forming a gate electrode, and forming a source electrode and a drain electrode. The metal oxide channel layer has a material selected from SnO.sub.2, ITO, ZnO, SnO.sub.2 and In.sub.2O.sub.3 with a thickness less than a threshold value. With the thickness less than the threshold value the metal oxide channel layer exhibits pinch-off behavior in transfer characteristics and has a mobility trend without saturation under positive operational voltage.

A method of producing a thin film transistor includes: forming a gate electrode; forming a gate insulating film that contacts the gate electrode; forming, by a liquid phase method, an oxide semiconductor layer arranged facing the gate electrode with the gate insulating film provided therebetween, the oxide semiconductor layer including a first region and a second region, the first region being represented by In.sub.(a)Ga.sub.(b)Zn.sub.(c)O.sub.(d), the second region being represented by In.sub.(e)Ga.sub.(f)Zn.sub.(g)O.sub.(h), and the second region being located farther from the gate electrode than the first region; and forming a source electrode and a drain electrode that are arranged apart from each other and are capable of being conductively connected through the oxide semiconductor layer.

Transistors using nitride semiconductor layers as channels were experimentally manufactured. The nitride semiconductor layers were all formed through a sputtering method. A deposition temperature was set at less than 600 C., and a polycrystalline or amorphous In.sub.xGa.sub.yAl.sub.zN layer was obtained. When composition expressed with a general expression In.sub.xGa.sub.yAl.sub.zN (where x+y+z=1.0) falls within a range of 0.3x1.0 and 0z<0.4, a transistor 1a exhibiting an ON/OFF ratio of 10.sup.2 or higher can be obtained. That is, even a polycrystalline or amorphous film exhibits electric characteristics equal to those of a single crystal. Therefore, it is possible to provide a semiconductor device in which constraints to manufacturing conditions are drastically eliminated, and which includes an InGaAlN-based nitride semiconductor layer which is inexpensive and has excellent electric characteristics as a channel.

According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, first and second insulating members, and a first nitride member. A position of the third electrode in a first direction from the first to second electrodes is between positions of the first and second electrodes in the first direction. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first to fifth partial regions. The second semiconductor region includes first and second semiconductor portions. The second semiconductor portion includes first and second portions, and a third portion between the first and second portions. The first conductive member includes first and second conductive regions. The first insulating member includes a first insulating region. The second insulating member includes first and second insulating portions. The first nitride member includes a first nitride region.

A tuning method for active metamaterials using IGZO Schottky diodes, wherein the IGZO Schottky diode comprises a substrate, a Schottky electrode, amorphous IGZO active layer, and an ohmic electrode from the bottom up. The method comprises steps as follows: (1) Metamaterials are used as the Schottky electrodes, and amorphous IGZO active layers are used to fully cover the capacitive gap structures in the metamaterials; such capacitive structures in the metamaterials are bonded to the amorphous IGZO active layers to form Shottky barriers; (2) The resulting IGZO Schottky diodes from step (1) are used to tune the metamaterials dynamically.

Provided are a gate structure and a method of forming the same. The gate structure includes a gate dielectric layer, a metal layer, and a cluster layer. The metal layer is disposed over the gate dielectric layer. The cluster layer is sandwiched between the metal layer and the gate dielectric layer, wherein the cluster layer at least includes an amorphous silicon layer, an amorphous carbon layer, or an amorphous germanium layer. In addition, a semiconductor device including the gate structure is provided.

Provided are an electronic/optical device, which is reduced in contact resistance occurring between a layered material layer and a metal electrode layer, and a method of manufacturing the device. The electronic/optical device of the present invention includes a laminated structure in which an intermediate layer is arranged between a layered material layer (2) and a metal electrode layer (3). The intermediate layer is a crystal layer (4) of an intermediate layer-forming material containing: at least one of Sb and Bi; and Te. In addition, the method of manufacturing an electronic/optical device of the present invention includes: an intermediate layer-forming step of forming, on the layered material layer (2), the intermediate layer (crystal layer (4)) obtained by crystallizing an intermediate layer-forming material containing: at least one of Sb and Bi; and Te; and a metal electrode layer-forming step of forming the metal electrode layer (3) on the intermediate layer.

The present invention provides a fin-shaped field effect transistor (FinFET), comprises: a substrate having a fin structure; a plurality trenches formed on the fin structure with an alloy grown in the trenches; a gate structure on the fin structure perpendicular to an extending direction of the fin structure in-between the plurality of trenches; and an amorphous layer on a surface of the fin structure exposed by the gate structure and disposed in-between the gate structure and the alloy. The invention also provides a manufacturing method of a fin-shaped field effect transistor (FinFET).

Oxide layers which contain at least one metal element that is the same as that contained in an oxide semiconductor layer including a channel are formed in contact with the top surface and the bottom surface of the oxide semiconductor layer, whereby an interface state is not likely to be generated at each of an upper interface and a lower interface of the oxide semiconductor layer. Further, it is preferable that an oxide layer, which is formed using a material and a method similar to those of the oxide layers be formed over the oxide layers Accordingly, the interface state hardly influences the movement of electrons.