Tunneling field effect transistors (TFETs) including a variable bandgap channel are described. In some embodiments, one or more bandgap characteristics of the variable bandgap channel may be dynamically altered by at least one of the application or withdrawal of a force, such as a voltage or electric field. In some embodiments the variable bandgap channel may be configured to modulate from an ON to an OFF state and vice versa in response to the application and/or withdrawal of a force. The variable bandgap channel may exhibit a bandgap that is smaller in the ON state than in the OFF state. As a result, the TFETs may exhibit one or more of relatively high on current, relatively low off current, and sub-threshold swing below 60 mV/decade.

A graphene-based valley filter includes a bottom gate, a bilayer graphene and two top gates. The bilayer graphene is deposited on the bottom gate and includes scattering defects. The top gates are deposited on the bilayer graphene. The top gates define a channel in the bilayer graphene, and the scattering defects are located in the vicinity of the channel. A vertical electric field is formed to open a band gap and produce electronic energy subbands in the channel. A transverse in-plane electric field is formed to produce pseudospin splitting in the subbands of the bilayer graphene. The scattering defects are for producing scattering between two opposite energy valley states of the bilayer graphene, couples subband states of opposite pseudospins and opens a pseudogap at a crossing point of the two subbands. Electrons are passed through the channel to become valley polarized in the bilayer graphene.

To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.

A method for manufacturing a semiconductor device, which enables miniaturization and reduction of defect, is provided. It includes forming an oxide semiconductor layer, and source and drain electrodes in contact with the oxide semiconductor layer, over an insulating surface; forming insulating layers over the source electrode and the drain electrode; forming a gate insulating layer over the oxide semiconductor layer, the source and drain electrodes, and the insulating layer; forming a conductive layer over the gate insulating layer; forming an insulating film covering the conductive layer; processing the insulating film so that at least part of a region of the conductive layer, which overlaps with the source electrode or the drain electrode, is exposed; and etching the exposed region of the conductive layer to form a gate electrode overlapping with at least part of the region sandwiched between the source electrode and the drain electrode, in a self-aligned manner.

A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.

A display device is disclosed, which includes: a substrate; a first conductive layer disposed on the substrate and including a gate with a gate edge parallel to a first direction; a semiconductor layer disposed on the first conductive layer; and a second conductive layer disposed on the semiconductor layer and including a drain and a data line extending along the first direction, the second conductive layer electrically connecting to the semiconductor layer, the drain including a drain edge parallel to the first direction, the gate edge located between the data line and the drain edge, and a projection of the drain on the substrate located in a projection of the semiconductor layer on the substrate. Herein, a maximum width of the semiconductor layer overlapping the gate edge along the first direction is smaller than maximum widths thereof overlapping the gate and the drain edge along the first direction.

A semiconductor device includes a transistor and a capacitor. The transistor includes a first conductive film; a first insulating film including a film containing hydrogen; a second insulating film including an oxide insulating film; an oxide semiconductor film including a first region and a pair of second regions; a pair of electrodes; a gate insulating film; and a second conductive film. The capacitor includes a lower electrode, an inter-electrode insulating film, and an upper electrode. The lower electrode contains the same material as the first conductive film. The inter-electrode insulating film includes a third insulating film containing the same material as the first insulating film and a fourth insulating film containing the same material as the gate insulating film. The upper electrode contains the same material as the second conductive film. A fifth insulating film containing hydrogen is provided over the transistor.

In one example, a method for fabricating a semiconductor device includes forming a mandrel comprising silicon. Sidewalls of the silicon are orientated normal to the <111> direction of the silicon. A nanowire is grown directly on at least one of the sidewalls of the silicon and is formed from a material selected from Groups III-V. Only one end of the nanowire directly contacts the silicon.

A method for manufacturing a semiconductor device comprises epitaxially growing a plurality of silicon layers and compressively strained silicon germanium (SiGe) layers on a substrate in a stacked configuration, wherein the silicon layers and compressively strained SiGe layers are alternately stacked on each other starting with a silicon layer on a bottom of the stacked configuration, patterning the stacked configuration to a first width, selectively removing a portion of each of the silicon layers in the stacked configuration to reduce the silicon layers to a second width less than the first width, forming an oxide layer on the compressively strained SiGe layers of the stacked configuration, wherein forming the oxide layer comprises fully oxidizing the silicon layers so that portions of the oxide layer are formed in place of each fully oxidized silicon layer, and removing part of the oxide layer while maintaining at least part of the portions of the oxide layer formed in place of each fully oxidized silicon layer, wherein the compressively strained SiGe layers are anchored to one another and a compressive strain is maintained in each of the compressively strained SiGe layers.

An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.