The reliability of a semiconductor device is improved. In this disclosure, a gate insulating film is formed on a silicon carbide semiconductor substrate in a process using a material gas containing a halogen element and a metal element by an ALD method.

A method for adjusting a channel length of silicon carbide MOSFET includes depositing a buffer layer and a poly-silicon layer on a first conductivity type epitaxial layer having a plurality of second conductivity type bases, etching the poly-silicon layer to form a poly-silicon pattern, depositing a spacer layer on the poly-silicon pattern and exposed buffer layer to a first deposition thickness, forming a first width of spacers of the poly-silicon pattern by dry etching the spacer layer, forming a pair of first conductivity type source regions on the second conductivity type bases by ion implantation into a first pattern mask formed on the buffer layer, forming a second conductivity type source region on the second conductivity type bases by implanting ions into a second pattern mask, and forming a gate electrode on a first channel extending from the first conductivity type source region to the first conductivity type epitaxial layer.

A manufacturing process vertical-conduction power device includes: from a layer containing semiconductor material with a lattice structure having spatial symmetry, growing an epitaxial layer, having the lattice structure with spatial symmetry and a first electrical conductivity; forming body having regions a second electrical conductivity, opposite to the first electrical conductivity, in the epitaxial layer; and forming a current-spreading layer in the epitaxial layer between the body regions. Forming the body regions includes carrying out a body channeling ion implantation, using a body mask. Forming the current-spreading layer includes: forming shallow damaged regions in the body regions through the body mask so that the lattice structure is altered in the shallow damaged regions; and carrying out a current-spreading channeling ion implantation, using the shallow damaged regions as implantation mask.

A silicon carbide (SiC) semiconductor element includes a semiconductor layer, a dielectric layer on a surface of the semiconductor layer, a gate electrode layer on the dielectric layer, a first doped region, a second doped region, a shallow doped region and a third doped region. The semiconductor layer is of a first conductivity type. The first doped region is of a second conductivity type and includes an upper doping boundary spaced from the surface by a first depth. The shallow doped region is of the second conductivity type, and extends from the surface to a shallow doped depth. The second doped region is adjacent to the shallow doped region and is at least partially in the first doped region. The third doped region is of the second conductivity type and at least partially overlaps the first doped region.

When hydrogen penetrates in to the semiconductor device, a gate voltage threshold of a gate structure (Vth) is shifted.

Penetrating of hydrogen into the semiconductor device from the edge termination structure section which is positioned at an end portion of the semiconductor device is prevented.

To provide a semiconductor device comprising a semiconductor substrate in which an active region and an edge termination structure section which is provided around the active region are provided, a first lower insulating film which is provided in the edge termination structure section on the semiconductor substrate, and a first protective film which is provided on the first lower insulating film, and is electrically insulated from the semiconductor substrate, and occludes hydrogen.

Provided is a semiconductor device including a semiconductor substrate, an electrode provided on a front surface of the semiconductor substrate, where the electrode contains aluminum, a barrier layer provided between the semiconductor substrate and the electrode. Here, the barrier layer includes a first titanium nitride layer, a first titanium layer, a second titanium nitride layer and a second titanium layer in a stated order with the first titanium nitride layer being positioned closest to the semiconductor substrate.

A silicon carbide semiconductor device includes a silicon carbide substrate, a gate insulating film, a gate electrode, an interlayer insulating film, and a gate interconnection. The silicon carbide substrate includes: a first impurity region; a second impurity region provided on the first impurity region; and a third impurity region provided on the second impurity region so as to be separated from the first impurity region. A trench has a side portion and a bottom portion, the side portion extending to the first impurity region through the third impurity region and the second impurity region, the bottom portion being located in the first impurity region. When viewed in a cross section, the interlayer insulating film extends from above the third impurity region to above the gate electrode so as to cover the corner portion.

Methods of forming a semiconductor device are provided. A method includes introducing impurities into a part of a semiconductor substrate at a first surface of the semiconductor substrate by ion implantation, the impurities being configured to absorb electromagnetic radiation of an energy smaller than a bandgap energy of the semiconductor substrate. The method further includes forming a semiconductor layer on the first surface of the semiconductor substrate. The method further includes irradiating the semiconductor substrate with electromagnetic radiation configured to be absorbed by the impurities and configured to generate local damage of a crystal lattice of the semiconductor substrate. The method further includes separating the semiconductor layer and the semiconductor substrate by thermal processing of the semiconductor substrate and the semiconductor layer, where the thermal processing is configured to cause crack formation along the local damage of the crystal lattice by thermo-mechanical stress.

Provided is a group 13 nitride epitaxial substrate with which the HEMT device having superior characteristics can be manufactured. This epitaxial substrate is provided with: a base substrate composed of SiC and having a main surface with a (0001) plane orientation; a nucleation layer formed on one main surface of the base substrate and composed of AlN; an electron transit layer formed on the nucleation layer and composed of a group 13 nitride with the composition Al.sub.yGa.sub.1yN (0y<1); and a barrier layer formed on the electron transit layer and composed of a group 13 nitride with the composition In.sub.zAl.sub.1zN (0.13z0.23) or Al.sub.wGa.sub.1wN (0.15w0.35). The (0001) plane of the base substrate has an off angle of 0.1 or more and 0.5 or less, and an intermediate layer composed of a group 13 nitride with the composition Al.sub.xGa.sub.1xN (0.01x0.4) is further provided between the nucleation layer and the electron transit layer.

Production of an integrated circuit including an electrical contact on SiC is disclosed. One embodiment provides for production of an electrical contact on an SiC substrate, in which a conductive contact is produced on a boundary surface of the SiC substrate by irradiation and absorption of a laser pulse on an SiC substrate.