Various approaches are discussed for using four-side buttable CMOS tiles to fabricate detector panels, including large-area detector panels. Fabrication may utilize pads and interconnect structures formed on the top or bottom of the CMOS tiles. Electrical connection and readout may utilize readout and digitization circuitry provided on the CMOS tiles themselves such that readout of groups or sub-arrays of pixels occurs at the tile level, while tiles are then readout at the detector level such that readout operations are tiered or multi-level.

A PET detector and method thereof are provided. The PET detector may include: a crystal array including a plurality of crystal elements arranged in an array and light-splitting structures set on surfaces of the plurality of crystal elements, the light-splitting structures jointly define a light output surface of the crystal array; a semiconductor sensor array, which is set in opposite to the light output surface of the crystal array and is suitable to receive photons from the light output surface, the semiconductor sensor array comprises a plurality of semiconductor sensors arranged in an array.

With an image sensor in which the amplifier circuit is disposed at each pixel, there is such an issue that the threshold voltage of the transistor fluctuates so that the signal voltage fluctuates because a voltage is continuously applied between the source and the gate of the transistor at all times when using the amorphous thin film semiconductor as the transistor that constitutes an amplifier circuit. The gate-source potential of the TFT that constitutes the amplifier circuit is controlled so that the gate terminal voltage becomes smaller than the source terminal voltage in an integrating period where the pixels accumulate the signals, and controlled so that the gate terminal voltage becomes larger than the source terminal voltage in a readout period where the pixels output the signals.

A system and method for a multi-sensor pixel architecture for use in a digital imaging system is described. The system includes at least one semiconducting layer for absorbing radiation incident on opposites of the at least one semiconducting layer along with a set of electrodes on one side of the semiconducting layer for transmitting a signal associated with the radiation absorbed by the semiconducting layer.

An imaging system detector array (112) includes a detector tile (116). The detector tile includes a photosensor array (202), including a plurality of photosensor pixels (204). The detector tile further includes a scintillator array (212) optically coupled to the photosensor array. The detector tile further includes an electronics layer or ASIC on a substrate (214) that is electrically coupled to the photosensor array. The electronics layer includes a plurality of individual and divisible processing regions (302). Each processing region including a predetermined number of channels corresponding to a sub-set of the plurality of photosensor pixels. The processing regions are in electrical communication with each other. Each processing region includes its own electrical reference and bias circuitry (802, 804).

Improved imaging systems are disclosed. More particularly, the present disclosure provides for an improved image sensor assembly for an imaging system, the image sensor assembly having an integrated photodetector array and its associated data acquisition electronics fabricated on the same substrate. By integrating the electronics on the same substrate as the photodetector array, this thereby reduces fabrications costs, and reduces interconnect complexity. Since both the photodiode contacts and the associated electronics are on the same substrate/plane, this thereby substantially eliminates certain expensive/time-consuming processing techniques. Moreover, the co-location of the electronics next to or proximal to the photodetector array provides for a much finer resolution detector assembly since the interconnect bottleneck between the electronics and the photodetector array is substantially eliminated/reduced. The co-location of the electronics next to or proximal to the photodetector array also enables/facilitates programmable pixel configuration for optimal image quality.

The present invention is a photodiode or photodiode array having improved ruggedness for a shallow junction photodiode which is typically used in the detection of short wavelengths of light. In one embodiment, the photodiode has a relatively deep, lightly-doped P zone underneath a P+ layer. By moving the shallow junction to a deeper junction in a range of 2-5 m below the photodiode surface, the improved device has improved ruggedness, is less prone to degradation, and has an improved linear current.

A photoelectric conversion device has a pixel area including an effective pixel row and a reference pixel row, the reference pixel row containing a plurality of reference pixel pairs, each pair composed of a first reference pixel and a second reference pixel arranged adjacent to each other. The first and second reference pixels output reference signals having different signal levels and independent of the quantity of incident light.

The semiconductor device comprises a semiconductor wafer with an integrated circuit, formed by a plurality of dies, a further semiconductor wafer, which differs from the semiconductor wafer in diameter and semiconductor material, the semiconductor wafer and the further semiconductor wafer being bonded to one another by means of a bonding layer, and an electrically conductive contact layer arranged on the further semiconductor wafer opposite to the bonding layer.

A flat panel detector is provided having a circular active area. The flat panel detector is built using complementary metal-oxide-semiconductor (CMOS) tiles. In one implementation, the flat panel detector having a circular active area can be used as a replacement for a conventional image intensifier, including an image intensifier used in a fluoroscopy system.