A scintillator element (22) includes scintillator blocks (60) arranged to form an array, and transparent or translucent material (62) disposed between adjacent scintillator blocks of the array. The transparent or translucent material may comprise epoxy or glue disposed between adjacent scintillator blocks of the array and adhering the adjacent scintillator blocks together. In some embodiments the scintillator blocks have a refractive index for scintillation light of at least =1.8, and the transparent or translucent material has a refractive index for the scintillation light of at least =1.6. An array of light detectors (24), such as silicon photomultipliers (SiPM) detectors formed monolithically on a silicon substrate, may be disposed on a bottom face of the scintillator element to detect scintillation light generated in the scintillator element. For PET applications, the scintillator element and the array of light detectors define a radiation detector (20) configured to detect 511 keV radiation.

An MN array of sensor tiles are attached to a substrate using a compliant film that includes an adhesive. A thickness of the compliant film varies depending on a thickness of the sensor tiles so that outward facing sides of the sensor tiles are coplanar.

Some embodiments include a semiconductor device. The semiconductor device includes a transistor having a gate metal layer, a transistor composite active layer, and one or more contact elements over the transistor composite active layer. The transistor composite active layer includes a first active layer and a second active layer, the first active layer is over the gate metal layer, and the second active layer is over the first active layer. Meanwhile, the semiconductor device also includes one or more semiconductor elements forming a diode over the transistor. The semiconductor element(s) have an N-type layer over the transistor, an I layer over the N-type layer, and a P-type layer over the I layer. Other embodiments of related systems and methods are also disclosed.

A highly sensitive imaging device that can perform imaging even under a low illuminance condition is provided. One electrode of a photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of a first transistor and one of a source electrode and a drain electrode of a third transistor. The other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor. The other electrode of the photoelectric conversion element is electrically connected to a first wiring. A gate electrode of the first transistor is electrically connected to a second wiring. When a potential supplied to the first wiring is HVDD, the highest value of a potential supplied to the second wiring is lower than HVDD.

The disclosed embodiments include an image sensor and a method to manufacture thereof. In one embodiment, the method includes forming a plurality of semiconductor slices having a uniform width, at least two of the semiconductor slices having different lengths, and each of the semiconductor slices having a slice edge defining a side of the semiconductor slice. The method further includes arranging the semiconductor slices to form a semi-rectangular shape defining boundaries of the image sensor, each of the semiconductor slices being disposed proximate to another semiconductor slice of the plurality of semiconductor slices. Forming each semiconductor slice includes forming a plurality of pixel arrays over the semiconductor slice, the pixel arrays having an approximately uniform pixel pitch, and forming a seal ring around the semiconductor slice, the seal ring enclosing the semiconductor slice and the pixel arrays of the semiconductor slice, and each semiconductor slice having a different seal ring.

A common interconnect ring is provided at a periphery of a portion used to form a TFT array of an X-ray flat panel detector, and an X-ray flat panel detector TFT array substrate connected to signal lines and scanning lines via pairs of two protection diodes connected in parallel and having mutually-reverse polarities is manufactured. When inspecting the X-ray flat panel detector TFT array substrate, the same reference bias voltage as the amplifier of a detection circuit is applied from an external voltage application pad provided at the vicinity of a connection unit for the common interconnect ring and the protection diodes on the same side of the signal lines, a signal is provided to a scanning line connection pad to switch the thin film transistor ON, and an electrical signal flowing through the signal line is read from a signal line connection pad.

The present approach relates to the fabrication of radiation detectors. In certain embodiments, additive manufacture techniques, such as 3D metallic printing techniques are employed to fabricate one or more parts of a detector. In an example of one such printing embodiment, amorphous silicon may be initially disposed onto a substrate and a laser may be employed to melt some or all of the amorphous silicon so as to form crystalline silicon circuitry of a light imager panel. Such printing techniques may also be employed to fabricate other aspects of a radiation detector, such as a scintillator layer.

The present disclosure provides a detector substrate and a flat panel detector, the detector substrate includes a substrate base and detector pixel units on the substrate base, each detector pixel unit includes: a driver circuit; a photoelectric conversion device disposed on a side, away from the substrate base, of the driver circuit, the photoelectric conversion device including at least two photoelectric conversion structures connected in series, a bottom electrode of a first photoelectric conversion structure being electrically connected with the driver circuit, and a top electrode of an n.sup.th photoelectric conversion structure being electrically connected with a bottom electrode of an (n+1).sup.th photoelectric conversion structure, with n being greater than or equal to 1; and a bias voltage line on a side of the photoelectric conversion device away from the substrate base, the bias voltage line being electrically connected to a top electrode of a last photoelectric conversion structure.

A focal plane array includes a mosaic integrated circuit device having a plurality of discrete integrated circuit tiles mounted on a motherboard. The focal plane array includes an optically continuous detector array electrically connected to the mosaic integrated circuit device with an interposer disposed therebetween. The interposer is configured to adjust a pitch of the continuous detector array to match a pitch of each of the plurality of discrete integrated circuit tiles so that the optical gaps between each of the plurality of integrated circuit tiles on the motherboard are minimized and the detector array is optically continuous, having high yield over the large format focal plane array.

A photoelectric conversion panel includes a TFT, a photodiode, a first organic film formed on an upper layer from the photodiode, a bias line formed on an upper layer from the first organic film, a data line separated from the bias line, a second organic film covering the first organic film, the bias line, and the data line, and a first inorganic insulating film. Part of the second organic film is disposed between the bias line and the data line. The first inorganic insulating film covers the second organic film.