A fin tunnel field effect transistor includes a seed region and a first type region disposed above the seed region. The first type region includes a first doping. The fin tunnel field effect transistor includes a second type region disposed above the first type region. The second type region includes a second doping that is opposite the first doping. The fin tunnel field effect transistor includes a gate insulator disposed above the second type region and a gate electrode disposed above the gate insulator. A method for forming an example fin tunnel field effect transistor is provided.

An Si/Ge SACM avalanche photo-diodes (APD) having low breakdown voltage characteristics includes an absorption region and a multiplication region having various layers of particular thicknesses and doping concentrations. An optical waveguide can guide infrared and/or optical signals or energy into the absorption region. The resulting photo-generated carriers are swept into the i-Si layer and/or multiplication region for avalanche multiplication. The APD has a breakdown bias voltage of well less than 12 V and an operating bandwidth of greater than 10 GHz, and is therefore suitable for use in consumer electronic devices, high speed communication networks, and the like.

Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.

A SPAD including, in a substrate of a first conductivity type: a first region of the second conductivity type extending from the upper surface of the substrate; a second region of the first type of greater doping level than the substrate, extending from the lower surface of the first region, having a surface area smaller than that of the first region and being located opposite a central portion of the first region; a third region of the first type of greater doping level than the substrate extending from the upper surface of the substrate, laterally surrounding the first region; and a fourth buried region of the first type of greater doping level than the substrate, forming a peripheral ring connecting the second region to the third region.

In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.

In one aspect of the present invention, a photovoltaic device is provided. The photovoltaic device includes a window layer and an absorber layer disposed on the window layer, wherein the absorber layer includes a first region and a second region, the first region disposed adjacent to the window layer. The absorber layer further includes a first additive and a second additive, wherein a concentration of the first additive in the first region is greater than a concentration of the first additive in the second region, and wherein a concentration of the second additive in the second region is greater than a concentration of the second additive in the first region. Method of making a photovoltaic device is also provided.

A photoconductor includes a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer, a first electrode connected to a first lateral side of the first semiconductor layer and the second semiconductor layer, and a second electrode connected to a second lateral side of the first semiconductor layer and the second semiconductor layer, where the first semiconductor layer and the second semiconductor layer form a type II junction or a quasi-type-II junction.

A composition of matter and method of forming copper indium gallium sulfide (CIGS), copper indium gallium selenide (CIGSe), or copper indium gallium telluride thin film via conversion of layer-by-layer (LbL) assembled CuInGa oxide (CIGO) nanoparticles and polyelectrolytes. CIGO nanoparticles are created via a flame-spray pyrolysis method using metal nitrate precursors, subsequently coated with polyallylamine (PAH), and dispersed in aqueous solution. Multilayer films are assembled by alternately dipping a substrate into a solution of either polydopamine (PDA) or polystyrenesulfonate (PSS) and then in the CIGO-PAH dispersion to fabricate films as thick as 1-2 microns. After LbL deposition, films are oxidized to remove polymer and sulfurized, selenized, or tellurinized to convert CIGO to CIGS, CIGSe, or copper indium gallium telluride.

A tunnel junction for a semiconductor device is disclosed. The tunnel junction includes a n-doped tunnel layer and a p-doped tunnel layer. The p-doped tunnel layer is constructed of aluminum gallium arsenide antimonide (AlGaAsSb). A semiconductor device including the tunnel junction with the p-doped tunnel layer constructed of AlGaAsSb is also disclosed.

A process of forming and the resulting nano-pitted metal substrate that serves both as patterns to grow nanostructured materials and as current collectors for the resulting nanostructured material is disclosed herein. The nano-pitted substrate can be fabricated from any suitable conductive material that allows nanostructured electrodes to be grown directly on the substrate.