The present disclosure relates to semiconductor manufacturing technology, particularly relates to a light-emitting diode, which includes a light-emitting layer, an N-type semiconductor layer, a P-type semiconductor layer, an electron blocking layer and a connecting layer. The light- emitting layer has a first side and a second side opposite to each other. The N-type semiconductor layer is disposed on the first side of the light-emitting layer. The P-type semiconductor layer is disposed on the second side of the light-emitting layer. The electron blocking layer is disposed between the light-emitting layer and the P-type semiconductor layer. The connecting layer is disposed between the light-emitting layer and the electron blocking layer, wherein, the connecting layer is doped with indium.

A nitride semiconductor ultraviolet light-emitting element is provided. The element includes a light-emitting element structure part with an n-type layer, an active layer, and a p-type layer stacked vertically, which are made of AlGaN-based semiconductors with wurtzite structure. The n-type layer has an n-type AlGaN-based semiconductor, the active layer has well layers including an AlGaN based semiconductor, and the p-type layer has a p-type AlGaN-based semiconductor. Each semiconductor layer in the n-type and the active layers is an epitaxially grown layer having a surface on which multi-step terraces parallel to the (0001) plane are formed. The n-type layer has first Ga-rich regions which include n-type AlGaN regions in which an AlGaN composition ratio is an integer ratio of Al.sub.1Ga.sub.1N.sub.2. The well layer includes a second Ga-rich region, which includes an AlGaN region in which an AlGaN composition ratio is an integer ratio of Al.sub.1Ga.sub.2N.sub.3.

A light-emitting element includes, successively from a lower side to an upper side, a first n-side semiconductor layer, a first active layer, a first p-side semiconductor layer, a second n-side semiconductor layer, a second active layer, and a second p-side semiconductor layer, each made of a nitride semiconductor. The second n-side semiconductor layer contacts the first p-side semiconductor layer. The second n-side semiconductor layer includes, successively from a lower side to an upper side, a first layer including gallium, a second layer including aluminum and gallium, and a third layer including gallium and having a lower n-type impurity concentration than the first and second layers. A thickness of the first layer and a thickness of the second layer each is less than 50% of a thickness of the third layer.

An epitaxial structure includes a quantum well structure, a first type semiconductor layer, and a second type semiconductor layer. The quantum well structure has an upper surface and a lower surface opposite to each other and includes at least one quantum well layer and at least one quantum barrier layer stacked alternately. The quantum well layer includes at least one patterned layer, and the patterned layer includes multiple geometric patterns. The first type semiconductor layer is disposed on the lower surface of the quantum well structure. The second type semiconductor layer is disposed on the upper surface of the quantum well structure.

A device, such as, an information processing or communications device, including a body of semiconductor material consisting principally of silicon, one or more luminescence centres disposed in the body of semiconductor material, one or more optical degrees of freedom associated with the one or more luminescence centres, and one or more local degrees of freedom associated with the one or more luminescence centres. A respective optical degree of freedom is associated with a respective luminescence centre. A respective local degree of freedom is associated with a respective luminescence centre. The one or more local degrees of freedom modify the one or more optical degrees of freedom.

This application provides semiconductor structures and methods of manufacturing the same. A semiconductor structure includes: an N-type semiconductor layer, a light emitting layer, and a P-type ion doped layer that are disposed from bottom to up, wherein the P-type ion doped layer comprises an activated region and non-activated regions located on two sides of the activated region, P-type doping ions in the activated region are activated, and P-type doping ions in the non-activated region are passivated. The layout of the activated region and the non-activated regions makes an LED include: a high-efficiency light emitting region and light emitting obstacle regions located on two sides of the high-efficiency light emitting region.

A method of manufacturing a semiconductor light emitting element includes: providing a first light emitting part that includes a first active layer, providing a first semiconductor layer, forming a first bonding face that extends in a first crystal plane, which includes either one of (i) subjecting a principal face of the first light emitting part to an acidic or alkaline solution treatment, or (ii) polishing the principal face of the first light emitting part, forming a second bonding face that extends in a second crystal plane having a plane orientation different from a plane orientation of the first crystal plane, which includes the other one of (i) subjecting a principal face of the first semiconductor layer to an acidic or alkaline solution treatment, or (ii) polishing the principal face of the first semiconductor layer, and directly bonding the first bonding face and the second bonding face.

A semiconductor light-emitting device includes: a first semiconductor layer containing a first conductivity type nitride semiconductor; an active layer containing a nitride semiconductor including Ga or In; an electron barrier layer containing a nitride semiconductor including at least Al, and being of a second conductivity type; and a second semiconductor layer containing a second conductivity type nitride semiconductor. The electron barrier layer includes a region where an Al composition ratio increases monotonically toward the second semiconductor layer. A maximum impurity concentration position of the second conductivity type in the electron barrier layer is located between an interface on an active layer side of the electron barrier layer and an intermediate position between a maximum Al composition ratio position of the electron barrier layer in the region and an interface on an active layer side of the electron barrier layer.

A semiconductor device is provided, which includes a base, a semiconductor stack located on the base, and a first semiconductor layer located on the semiconductor stack. The semiconductor stack includes a first semiconductor structure adjacent to the base, a second semiconductor structure located on the first semiconductor structure, and a first active region located between the first semiconductor structure and the second semiconductor structure. The first semiconductor layer is located on the second semiconductor structure, and includes Al.sub.x1Ga.sub.1x1As, where 0.005x1<0.2. And the first semiconductor structure has a second thickness in a range of 3 m to 8 m. The semiconductor device outputs a first power corresponding to a light with a wavelength equal to or larger than 900 nm and less than 1100 nm, and a second power corresponding to a light with a wavelength less than 900 nm and larger than 700 nm. A ratio of the second power to a sum of the first power and the second power is equal to or less than 30%.

Micro-scale light emitting diodes (micro-LEDs) with ultra-low leakage current results from a sidewall passivation method for the micro-LEDs using a chemical treatment followed by conformal dielectric deposition, which reduces or eliminates sidewall damage and surface recombination, and the passivated micro-LEDs can achieve higher efficiency than micro-LEDs without sidewall treatments. Moreover, the sidewall profile of micro-LEDs can be altered by varying the conditions of chemical treatment.