H10F77/147

SHINGLED SOLAR CELL MODULE

A high efficiency configuration for a solar cell module comprises solar cells conductively bonded to each other in a shingled manner to form super cells, which may be arranged to efficiently use the area of the solar module, reduce series resistance, and increase module efficiency. The front surface metallization patterns on the solar cells may be configured to enable single step stencil printing, which is facilitated by the overlapping configuration of the solar cells in the super cells. A solar photovoltaic system may comprise two or more such high voltage solar cell modules electrically connected in parallel with each other and to an inverter. Solar cell cleaving tools and solar cell cleaving methods apply a vacuum between bottom surfaces of a solar cell wafer and a curved supporting surface to flex the solar cell wafer against the curved supporting surface and thereby cleave the solar cell wafer along one or more previously prepared scribe lines to provide a plurality of solar cells. An advantage of these cleaving tools and cleaving methods is that they need not require physical contact with the upper surfaces of the solar cell wafer. Solar cells are manufactured with reduced carrier recombination losses at edges of the solar cell, e.g., without cleaved edges that promote carrier recombination. The solar cells may have narrow rectangular geometries and may be advantageously employed in shingled (overlapping) arrangements to form super cells.

Structures and methods for high-efficiency pyramidal three-dimensional solar cells
09595622 · 2017-03-14 · ·

The present disclosure enables high-volume cost effective production of three-dimensional thin film solar cell (3-D TFSC) substrates. Pyramid-like unit cell structures 16 and 50 enable epitaxial growth through an open pyramidal structure 3-D TFSC embodiments 70, 82, 100, and 110 may be combined as necessary. A basic 3-D TFSC having a substrate, emitter, oxidation on the emitter, and front and back metal contacts allows for simple processing. Other embodiments disclose a selective emitter, selective backside metal contacts, and front-side SiN ARC layers. Several processing methods, including process flows 150, 200, 250, 300, and 350, enable production of these 3-D TFSCs.

Two-dimensional (2D) material element with in-plane metal chalcogenide-based heterojunctions and devices including said element

According to example embodiments, a two-dimensional (2D) material element may include a first 2D material and a second 2D material chemically bonded to each other. The first 2D material may include a first metal chalcogenide-based material. The second 2D material may include a second metal chalcogenide-based material. The second 2D material may be bonded to a side of the first 2D material. The 2D material element may have a PN junction structure. The 2D material element may include a plurality of 2D materials with different band gaps.

Microstructured silicon radiation detector

A radiation detector comprises a silicon body in which are defined vertical pores filled with a converter material and situated within silicon depletion regions. One or more charge-collection electrodes are arranged to collect current generated when secondary particles enter the silicon body through walls of the pores. The pores are disposed in low-density clusters, have a majority pore thickness of 5 m or less, and have a majority aspect ratio, defined as the ratio of pore depth to pore thickness, of at least 10.

Three-dimensional semiconductor template for making high efficiency solar cells
09590035 · 2017-03-07 · ·

A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality of walls aligned along a (111) crystallographic orientation plane. A method for manufacturing a semiconductor template by selectively removing silicon material from a silicon template to form a top surface aligned along a (100) crystallographic plane of the silicon template and a plurality of walls defining an inverted pyramidal cavity each aligned along a (111) crystallographic plane of the silicon template.

METHOD FOR PRODUCING SEMICONDUCTOR COMPONENTS AND SEMICONDUCTOR COMPONENT

A method for producing a plurality of semiconductor components (1) is provided, comprising the following steps: a) providing a semiconductor layer sequence (2) having a first semiconductor layer (21), a second semiconductor layer (22) and an active region (25), said active region being arranged between the first semiconductor layer and the second semiconductor layer for generating and/or receiving radiation; b) forming a first connection layer (31) on the side of the second connection layer facing away from the first semiconductor layer; c) forming a plurality of cut-outs (29) through the semiconductor layer sequence; d) forming a conducting layer (4) in the cut-outs for establishing an electrically conductive connection between the first semiconductor layer and the first connection layer; and e) separating into the plurality of semiconductor components, wherein a semiconductor body (20) having at least one of the plurality of cut-outs arises from the semiconductor layer sequence for each semiconductor component and the at least one cut-out is completely surrounded by the semiconductor body in a top view of the semiconductor body. Furthermore, a semiconductor component is provided.

WIDE SPECTRUM OPTICAL SENSOR

An optical sensor including a semiconductor substrate; a first light absorption region formed in the semiconductor substrate, the first light absorption region configured to absorb photons at a first wavelength range and to generate photo-carriers from the absorbed photons; a second light absorption region formed on the first light absorption region, the second light absorption region configured to absorb photons at a second wavelength range and to generate photo-carriers from the absorbed photons; and a sensor control signal coupled to the second light absorption region, the sensor control signal configured to provide at least a first control level and a second control level.

GUIDED-WAVE PHOTODETECTOR APPARATUS EMPLOYING MID-BANDGAP STATES OF SEMICONDUCTOR MATERIALS, AND FABRICATION METHODS FOR SAME

Guided-wave photodetectors based on absorption of infrared photons by mid-bandgap states in non-crystal semiconductors. In one example, a resonant guided-wave photodetector is fabricated based on a polysilicon layer used for the transistor gate in a SOI CMOS process without any change to the foundry process flow (zero-change CMOS). Mid-bandgap defect states in the polysilicon absorb infrared photons. Through a combination of doping mask layers, a lateral p-n junction is formed in the polysilicon, and a bias voltage applied across the junction creates a sufficiently strong electric field to enable efficient photo-generated carrier extraction and high-speed operation. An example device has a responsivity of more than 0.14 A/W from 1300 to 1600 nm, a 10 GHz bandwidth, and 80 nA dark current at 15 V reverse bias.

ELECTRONIC DEVICE COMPRISING A SOLAR CELL AND METHOD FOR MANUFACTURING SAID SOLAR CELL

The present invention relates to a solar cell (10) comprising a substrate (100) made of a transparent material and intended to be exposed to light radiation, a first electrode (110) formed on the substrate (100), and a unit solar cell (130) arranged between this first electrode (110) and a second electrode (120), the first and second electrodes (110, 120) being made of an electrically conductive and transparent material, the unit solar cell (130) being adapted to absorb light radiation and to generate an electric current therefrom at the terminals of said first and second electrodes (110, 120), the second electrode (120) and the unit solar cell (130) being perforated so as to allow light radiation to pass through said solar cell (10).

Ultraviolet detector and preparation method therefor

A ultraviolet detector includes a substrate; a first epitaxial layer that is a heavily doped epitaxial layer and located on the substrate, a second epitaxial layer located on the first epitaxial layer, where the second epitaxial layer is a lightly doped epitaxial layer, or a double-layer or multi-layer structure composed of at least one lightly doped epitaxial layer and at least one heavily doped epitaxial layer; an ohmic contact layer located on the second epitaxial layer or formed in the second epitaxial layer, where the ohmic contact layer is a graphical heavily doped layer; and a first metal electrode layer located on the ohmic contact layer.