The present disclosure relates to a heterojunction solar cell, a manufacturing method thereof and a photovoltaic module. The heterojunction solar cell includes a substrate of a first conductivity type, a tunnel layer located on a light-receiving surface of the substrate, and a doped polysilicon layer located on a top surface of the tunnel layer. The doped polysilicon layer has the first conductivity type.

Described herein are methods of fabricating solar cells. In an example, a method of fabricating a solar cell includes forming an amorphous dielectric layer on the back surface of a substrate opposite a light-receiving surface of the substrate. The method also includes forming a microcrystalline silicon layer on the amorphous dielectric layer by plasma enhanced chemical vapor deposition (PECVD). The method also includes forming an amorphous silicon layer on the microcrystalline silicon layer by PECVD. The method also includes annealing the microcrystalline silicon layer and the amorphous silicon layer to form a homogeneous polycrystalline silicon layer from the microcrystalline silicon layer and the amorphous silicon layer. The method also includes forming an emitter region from the homogeneous polycrystalline silicon layer.

The invention relates to a photoactive semiconductor component, especially a photovoltaic solar cell, having a semiconductor substrate, a carbon-containing SiC layer disposed indirectly upon a surface of the semiconductor substrate, and a passivating intermediate layer disposed indirectly or directly between the SiC layer and semiconductor substrate, and a metallic contact connection disposed indirectly or directly upon a side of the SiC layer facing away from the passivating intermediate layer and in electrically conductive connection with the SiC layer, where the SiC layer has p-type or n-type doping, which is characterized in that the SiC layer partly has a partly amorphous structure and partly has a crystalline structure.

A back-contact Si thin-film solar cell includes a crystalline Si absorber layer and an emitter layer arranged on the crystalline Si absorber layer, which include a contact system being arranged on the back so as to collect excess charge carriers generated by the incidence of light in the absorber layer; a barrier layer having a layer thickness in a range of from 50 nm to 1 m formed on a glass substrate; at least one coating layer intended for optical coating and thin layer containing silicon and/or oxygen adjoining the crystalline Si absorber layer arranged on the at least one coating layer for improving the optical characteristics. The crystalline Si absorber layer can be produced by means of liquid-phase crystallization, is n-conducting, and has monocrystalline Si grains. An SiO2 passivation layer is formed between the layer containing silicon and/or oxygen and the Si absorber layer during the liquid-phase crystallization.

A solar cell can include a silicon layer formed over a silicon substrate. The silicon layer can have a P-type doped region and an N-type doped region. Portions of the silicon layer can have a grain size larger than other portions of the silicon layer. For example, larger grains of the silicon layer formed within a depletion region between P-type and N-type doped regions can minimize recombination loss at the P-type and N-type doped region boundaries and improve solar cell efficiency.

A method for manufacturing a photovoltaic device includes a step of depositing one of an amorphous layer of ZnTe and a multilayer stack of Zn and Te adjacent a semiconductor layer. The one of the amorphous layer and the multilayer stack is then subjected to an energy impulse at a temperature equal to or greater than its critical temperature. The energy impulse results in an explosive crystallization to form a polycrystalline layer of ZnTe from the one of the amorphous layer and the multilayer stack.

Methods of fabricating solar cells with tunnel dielectric layers are described. Solar cells with tunnel dielectric layers are also described.

A manufacturing method for a solar cell includes: providing a P-type silicon wafer, the P-type silicon wafer being provided with a first surface and a second surface opposite to the first surface; sequentially depositing an oxide layer, a doped amorphous silicon film layer, and a silicon oxide mask layer on the first surface of the P-type silicon wafer; and removing the oxide layer, the doped amorphous silicon film layer, and the silicon oxide mask layer coated on the second surface. According to the manufacturing method, the surface texture uniformity of the front surface of a cell piece is can be further effectively improved, and the appearance of the front surface of the cell is improved, and thus, the cell efficiency and the product yield of the solar cell are improved. The present application also relates to a corresponding solar cell.

A flexible, non-flat solar cell comprises a flexible substrate. A pn junction is on or in the flexible substrate. The solar cell has been flexed so as to have a non-flat geometry that results in an increased surface area of the flexed solar cell with respect to the surface area of a flat solar cell that is the same as the flexed solar cell except that the flat solar cell has a flat surface geometry that has the same projected area on a lateral plane as does the flexed solar cell.

Disclosed are a photovoltaic cell, a method for producing the same and a photovoltaic module. The method includes providing a silicon wafer; forming a tunneling oxide layer on the silicon wafer and a P-type amorphous silicon layer over the tunneling oxide layer; forming N-type dopants on the P-type amorphous silicon layer; performing laser processing on the N-type dopants to cause the P-type amorphous silicon layer to be converted into an amorphous silicon layer having alternatingly arranged P-type amorphous silicon and N-type amorphous silicon; removing the N-type dopant on the amorphous silicon layer and forming a protective layer over the amorphous silicon layer; performing processing on the protective layer and the amorphous silicon layer to form a groove and a protrusion; subjecting the silicon wafer to further processing to increase a depth of the groove; removing the protective layer; and subjecting the silicon wafer to high temperature processing.