An imaging device which is capable of taking images with high quality and can be manufactured at low cost is provided. A first circuit includes a first transistor and a second transistor and a second circuit includes a third transistor and a photodiode. The first transistor and the third transistor are each an n-channel transistor including an oxide semiconductor layer as an active layer, and the second transistor is a p-channel transistor including an active region in a silicon substrate. The photodiode is provided in the silicon substrate. A region in which the first transistor and the second transistor overlap each other with an insulating layer positioned therebetween is provided. A region in which the third transistor and the photodiode overlap each other with the insulating layer positioned therebetween is provided.

An image sensor pixel includes a first photodiode and a second photodiode disposed in a semiconductor material. The first photodiode has a first doped region, a first lightly doped region, and a first highly doped region. The second photodiode has a second full well capacity substantially equal to a first full well capacity of the first photodiode, and includes a second doped region, a second lightly doped region, and a second highly doped region. The image sensor pixel also includes a first microlens optically coupled to direct a first amount of image light to the first photodiode, and a second microlens optically coupled to direct a second amount of image light to the second photodiode. The first amount of image light is larger than the second amount of image light.

An image sensor according to an example embodiment concepts includes a pixel array including pixels, and each of the pixels includes photoelectric conversion elements. The photoelectric conversion elements independently operating to detect a phase difference. The image sensor further includes a control circuit configured to independently control exposure times of each of the photoelectric conversion elements included in each of the pixels.

A method of implementing dynamic ground sharing in an image sensor with pipeline architecture starts with a pixel array capturing image data. Pixel array includes pixels to generate pixel data signals, respectively. A readout circuitry acquires the image data from a row in the pixel array. An analog-to-digital conversion (ADC) circuitry included in the readout circuitry samples the image data from the row to obtain sampled input data. When the ADC circuitry is sampling, a ground sharing switch is closed to couple the pixel array and the ADC circuitry to a common ground. When the ADC circuitry is not sampling, the ground sharing switch is open to separate the pixel array and the ADC circuitry from the common ground. The ADC circuitry converts the sampled image data from analog to digital to obtain an ADC output. Other embodiments are described.

An object of the present invention is to reduce capacitance of a charge accumulation part (floating diffusion) of each pixel unit. In an imaging device, in addition to a plurality of first switching transistors for coupling a plurality of coupling wires extending in the column direction, a second switching transistor is provided between each of the coupling wires and a floating diffusion in each pixel unit. Preferably, the gate of the first switching transistor and the gate of the second switching transistor are electrically coupled to each other.

The present technology relates to a solid-state imaging device and an electronic apparatus that realize a high frame rate image capture without deteriorating an image quality. A floating diffusion holds a charge accumulated on one or more photoelectric conversion units. A plurality of amplification transistors read out a signal corresponding to the charge held by the floating diffusion. The signal read out by the amplification transistor is output to a vertical signal line. The plurality of amplification transistors are connected in parallel. The present technology is applicable to a CMOS image sensor, for example.

The present invention provides an image sensor. An image sensor include a pixel array. The pixel array includes: a plurality of pixels; and an isolation structure suitable for insulating between the plurality of pixels. The isolation structure includes: a first conductivity-type conductive layer formed over a substrate; and a second conductivity-type pickup region formed in the first conductivity-type conductive layer and disposed between each plurality of pixels.

An imaging device with excellent imaging performance is provided. In the imaging device, a first layer, a second layer, and a third layer have a region overlapping with one another, the first layer and the second layer each include transistors, and the third layer includes a photoelectric conversion element. Off-state currents of the transistors formed in the first layer are lower than those of the transistors formed in the second layer, and field-effect mobilities of the transistors formed in the second layer are higher than those of the transistors formed in the first layer.

The performance of a solid state image sensor which is formed by performing divided exposure that exposes the entire chip by a plurality of times of exposure and in which each of a plurality of pixels arranged in a pixel array portion has a plurality of photodiodes is improved. In the divided exposure performed when the solid state image sensor is manufactured, a dividing line that divides an exposure region is defined to be located between a first photodiode and a second photodiode aligned in a first direction in an active region in a pixel and is defined to be along a second direction perpendicular to the first direction.

An image sensor includes a first photodiode with associated first sense node and a second photodiode with associated second sense node. A first transistor has its control node coupled to the first sense node and a second transistor has its control node coupled to the second sense node. The conduction paths (for example, source-drain paths) of the first and second transistors are coupled in series between first and second column lines associated with a column of the image sensor array. Switches control connection of the first and second column lines in two modes: one mode where a voltage is applied to the first column line and data from one of the photodiodes is read out by the second column line; and another mode where a voltage is applied to the second column line and data from the other of the photodiodes is read out by the first column line.