A semiconductor device includes a metal oxide layer over an insulating surface, an oxide semiconductor layer over the metal oxide layer, and an insulating layer over the oxide semiconductor. The insulating layer includes a first region overlapping the oxide semiconductor layer. A first aluminum concentration of the first region is greater than or equal to 110.sup.17 atoms/cm.sup.3.

The present disclosure provides an array substrate and a manufacturing method for the array substrate. The manufacturing method includes: forming a light-shielding layer, a source, and a drain on the substrate by using a first photomask; forming a semiconductor layer, a gate insulating layer, and a gate which are laminated on the source, the drain, and light-shielding layer by using a second photomask; forming a dielectric layer on the gate and the substrate, and a via hole exposing the drain on the dielectric layer by using a third photomask; and forming a pixel electrode on the dielectric layer by using a fourth photomask.

An organic light-emitting diode display includes an auxiliary connection line on a substrate; an auxiliary cathode on and connected to the auxiliary connection line; a passivation layer covering the auxiliary cathode; an overcoat layer on the passivation layer; a connection terminal connected to the auxiliary cathode on the overcoat layer; an undercut opening on the overcoat layer exposing a portion of the auxiliary cathode, an under area being in the undercut opening and under one side of the connection terminal; a bank having a size larger than the undercut opening and exposing the entire undercut opening; an organic emission layer on a region other than the under area in the undercut opening exposing the portion of the auxiliary cathode; and a cathode directly connected to the exposed portion of the auxiliary cathode on which the organic emission layer is not formed in the under area of the undercut opening.

A semiconductor device comprises a first insulating layer, an oxide semiconductor layer having a polycrystalline structure on the first insulating layer, a gate insulating layer on the oxide semiconductor layer, a gate wiring on the gate insulating layer, and a second insulating layer on the gate wiring. The oxide semiconductor layer has a first region, a second region and a third region aligned toward a first direction. The first region overlaps the gate insulating layer and the gate wiring. The third region is in contact with the second insulating layer. A distance from a top surface of the second region to a top surface of the second insulating layer is longer than a distance from a top surface of the third region to the top surface of the second insulating layer.

According to one embodiment, a display device includes first semiconductor layers crossing a first scanning line in a non-display area, the first semiconductor layers being a in number, second semiconductor layers crossing a second scanning line in the non-display area, the second semiconductor layers being b in number, and an insulating film disposed between the first and second semiconductor layers and the first and second scanning lines, wherein a and b are integers greater than or equal to 2, and a is different from b, and the first and second semiconductor layers are both entirely covered with the insulating film.

An organic light-emitting display apparatus includes: a display unit including an organic light-emitting element, a driving transistor electrically connected to the organic light-emitting element, and a capacitor; and a pad unit connected to the display unit, the capacitor including: a first conductive layer disposed on a substrate; a second conductive layer interposed between the substrate facing a first surface of the first conductive layer; and a third conductive layer disposed facing a second surface of the first conductive layer opposing the first surface of the first conductive layer, the third conductive layer being electrically connected to the second conductive layer.

An imaging device connected to a neural network is provided. An imaging device having a neuron in a neural network includes a plurality of first pixels, a first circuit, a second circuit, and a third circuit. Each of the plurality of first pixels includes a photoelectric conversion element. The plurality of first pixels is electrically connected to the first circuit. The first circuit is electrically connected to the second circuit. The second circuit is electrically connected to the third circuit. Each of the plurality of first pixels generates an input signal of the neuron. The first circuit, the second circuit, and the third circuit function as the neuron. The third circuit includes an interface connected to the neural network.

A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

An active matrix substrate includes a substrate, a pixel TFT that is supported by the substrate, provided corresponding to each of a plurality of pixel areas, and includes an oxide semiconductor layer, an organic insulating layer disposed above at least the oxide semiconductor layer of the pixel TFT, and an inorganic insulating layer disposed in contact with an upper surface of the organic insulating layer on the organic insulating layer. The organic insulating layer and the inorganic insulating layer are provided with a plurality of dual-layer hole structure portions, each of the dual-layer hole structure portions includes a through-hole provided in the inorganic insulating layer and a bottomed hole provided in the organic insulating layer and positioned below the through-hole, and the through-hole is positioned on an inner side of an outer edge of the bottomed hole when viewed from a normal direction of the substrate.

A thin film transistor, and a method for manufacturing the same and a display apparatus comprising the same are provided. The thin film transistor includes a light shielding layer, an active layer on the light shielding layer, a gate electrode spaced apart from the active layer and overlapping at least a portion of the active layer, and an internal bridge electrically connecting the light shielding layer and the gate electrode being insulated from the active layer. The internal bridge overlaps the gate electrode and penetrates the active layer along a direction from the gate electrode to the light shielding layer. In addition, one embodiment of the present disclosure provides a display apparatus including the thin film transistor.