The present disclosure discloses an array substrate and a liquid crystal display, the array substrate includes: a substrate; a thin film transistor disposed on the substrate; a conductive layer disposed on the thin film transistor and connected with a drain electrode of the thin film transistor; a common electrode disposed on the conductive layer and forming a first capacitor with the conductor layer; a pixel electrode disposed on the common electrode and connected with the conductive layer, the pixel electrode and the common electrode form a second capacitor. By the method above, the disclosure is capable of increasing capacitance of storage capacitors and improving optical performance of a display.

A semiconductor device (1001) includes a thin-film transistor (103) including a gate electrode (3a), source and drain electrodes (13as, 13ad), and an oxide semiconductor layer (7), and a source bus line (13s). The source electrode, the source bus line and the drain electrode include a first metallic element and the oxide semiconductor layer includes a second metallic element. When viewed along a normal to its substrate, at least respective portions of the source electrode, the source bus line, and the drain electrode overlap with the oxide semiconductor layer. A low reflecting layer (4s, 4d) which includes the first and second metallic elements and which has a lower reflectance to visible radiation than the source electrode has been formed between the source electrode and the oxide semiconductor layer, between the source bus line and the oxide semiconductor layer, and between the drain line and the oxide semiconductor layer.

A display may have an array of organic light-emitting diode display pixels. Each display pixel may have a light-emitting diode that emits light under control of a drive transistor. Each display pixel may also have control transistors for compensating and programming operations. The array of display pixels may have rows and columns. Row lines may be used to apply row control signals to rows of the display pixels. Column lines (data lines) may be used to apply display data and other signals to respective columns of display pixels. A bottom conductive shielding structure may be formed below each drive transistor. The bottom conductive shielding structure may serve to shield the drive transistor from any electric field generated from the adjacent row and column lines. The bottom conductive shielding structure may be electrically floating or coupled to a power supply line.

Provided is a TFT array substrate, which increases the area of a drain electrode of a TFT within a light-shielding zone to have the drain electrode overlapping a portion of a horizontal projection of a common electrode, wherein the drain electrode and the common electrode constitute a first storage capacitor and a pixel electrode and the common electrode constitute a second storage capacitor. The pixel electrode and the drain electrode are electrically connected and thus are of the same potential. The first storage capacitor and the second storage capacitor are connected in parallel and collectively form a storage capacitor such that the storage capacitor has a capacity that is equal to the sum of capacities of the first storage capacitor and the second storage capacitor, whereby, without reducing aperture ratio, the capacity of the storage capacitor is increased, crosstalk and image sticking are alleviated, and product display quality is enhanced.

Disclosed is a display device and a method of manufacturing the display device. The display device includes a pixel electrode disposed in an opening area; a common electrode having at least one region that overlaps the pixel electrode in the opening area; a gate line extending along a row direction in a non-opening area that surrounds the opening area; a data line extending along the non-opening area in a column direction that is perpendicular to the row direction; and a touch sensing line extending in the column direction across the opening area, wherein the opening area may have a shape in which a length of the opening area in the row direction is longer than a length of the opening area in the column direction.

An electronic device and a manufacturing method thereof are provided. The electronic device includes a substrate, a buffer layer, an oxide semiconductor layer, and a gate electrode. The buffer layer is disposed on the substrate. The oxide semiconductor layer is disposed on the buffer layer and has a first part and a second part adjacent to the first part. The gate electrode is overlapped with the first part. A part of the buffer layer is overlapped with the second part of the oxide semiconductor layer, The part of the buffer layer has a first portion and a second portion disposed on the first portion. The concentration of boron in the first portion is greater than the concentration of boron in the second portion.

Provided is a TFT array substrate, which increases the area of a drain electrode of a TFT within a light-shielding zone to have the drain electrode overlapping a portion of a horizontal projection of a common electrode, wherein the drain electrode and the common electrode constitute a first storage capacitor and a pixel electrode and the common electrode constitute a second storage capacitor. The pixel electrode and the drain electrode are electrically connected and thus are of the same potential. The first storage capacitor and the second storage capacitor are connected in parallel and collectively form a storage capacitor such that the storage capacitor has a capacity that is equal to the sum of capacities of the first storage capacitor and the second storage capacitor, whereby, without reducing aperture ratio, the capacity of the storage capacitor is increased, crosstalk and image sticking are alleviated, and product display quality is enhanced.

According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.

In accordance with some embodiments of the disclosed subject of matter, a TFT array substrate, a method for fabricating the TFT array substrate, and a display panel that comprises the TFT array substrate are provided. In some embodiments, the TFT array substrate comprises: a substrate; an active layer comprising a first region, a source region, a drain region, and a second region between the drain region and the first region; a gate electrode above the first insulating layer, wherein the gate electrode substantially covers the first region; and a first light-shielding layer that overlaps with the first region and substantially covers the second region.

A thin film transistor array panel device comprises: a base substrate; a barrier layer disposed over the base substrate and comprising a plurality of transparent material layers; and an array of thin film transistors disposed over the barrier layer. A difference between a refractive index of the barrier layer and a refractive index of the base substrate may be within about 6%. The transparent material layers may be arranged such that the transparent material layers having compressive residual stress and the transparent material layers having tensile residual stress are alternately stacked. Each of the transparent material layers may comprise silicon oxynitride (SiON).