An imaging device includes a controller and a generator. The controller controls an imaging unit on the basis of a command and data received from a host in accordance with an I2C/I3C communication protocol. The generator generates a second control signal indicating whether or not to apply intra-frame dynamic frequency scaling (DFS) or intra-frame dynamic voltage frequency scaling (DVFS) on the basis of a first control signal received from the host via a first route different from the I2C/I3C communication protocol, and outputs the second control signal to the host via a second route different from the I2C/I3C communication protocol.

An electronic device includes a reset circuit and a first image sensing circuit. The reset circuit is used to receive a reset signal and includes a plurality of transistors. The first image sensing circuit is coupled to the reset circuit and includes a photodiode, a first transistor and a second transistor. The photodiode has a first terminal. The first transistor has a first terminal coupled to the first terminal of the photodiode, and a second terminal. The second transistor has a first terminal coupled to the second terminal of the first transistor, and a second terminal configured to receive a row selection signal.

An object is to reduce a circuit scale in a solid-state imaging element that detects an address event. The solid-state imaging element is provided with a plurality of photoelectric conversion elements, a signal supply unit, and a detection unit. In this solid-state imaging element, each of the plurality of photoelectric conversion elements photoelectrically converts incident light to generate a first electric signal. Furthermore, in the solid-state imaging element, the detection unit detects whether or not a change amount of the first electric signal of each of the plurality of photoelectric conversion elements exceeds a predetermined threshold and outputs a detection signal indicating a result of the detection result.

A pulse generator of an image sensor includes a delay cell including a plurality of transistors arranged in series between a power voltage and a ground, a stabilization capacitor, and a stabilization switch. The power voltage is supplied to a first terminal of a first transistor disposed first among the plurality of transistors, and a gate terminal of the first transistor is connected to a first node. An input voltage is supplied to a gate terminal of an n-th transistor disposed last among the plurality of transistors, and a ground voltage is supplied to a first terminal of the n-th transistor. The stabilization switch is disposed between a reference voltage input terminal providing a reference voltage and the first node. The stabilization switch is turned on by an input bias control signal to supply the reference voltage to the first node.

A sensing device, including a plurality of sensing pixels arranged in Y rows and M columns, a plurality of readout lines coupled to the sensing pixels, and a plurality of control lines each coupled to a sensing pixel subset, is provided. The Y times N sensing pixels within the sensing pixel subset are arranged in adjacent N columns, where Y, M and N are integers and N is smaller than M. Each of the control lines is configured to control one row of the sensing pixel subset to output signals through corresponding readout lines.

A sensor system includes a sensor array and a gradation determination section. The sensor array includes a first sensor and a second sensor. The first sensor is configured to detect, with a first sensitivity, a variation in a quantity of light at a first pixel address. The second sensor is configured to detect, with a second sensitivity that is lower than the first sensitivity, a variation in a quantity of light at a second pixel address that is adjacent to or coincides with the first pixel address. The gradation determination section is configured to determine, when the first sensor generates a first event signal in response to a luminance variation event, a gradation of an object having caused the luminance variation event to occur, depending on whether or not the second sensor generates a second event signal in response to the luminance variation event.

Imagers and associated devices and systems are disclosed herein. In one embodiment, an imager includes a pixel array and control circuitry operably coupled to the pixel array. The pixel array includes an imaging pixel configured to produce a reset signal and a non-imaging pixel configured to produce a nominal reset signal. The control circuity is configured to produce an output signal based at least in part on one of (a) the nominal reset signal when distortion at the imaging pixel exceeds a threshold and (b) the reset signal when distortion does not exceed the threshold.

An image capturing apparatus includes: pixels that are arranged in a matrix and each include a photoelectric conversion portion; a column output line; an AD converter; a setting unit that sets a first driving mode for causing the AD converter to convert the analog signals into the digital signals with a resolution of n bits, or a second driving mode for causing the AD converter to convert the analog signals into the digital signals with a resolution of m bits; and a controller that controls an operation period, which extends from a start of outputting of the analog signals to a start of an operation of converting the analog signals into the digital signals, to be shorter when the setting unit has set the second driving mode than when the first driving mode has been set.

The invention concerns a structure of a CMOS active pixel, comprising a semi-conductive substrate (1) of a first type, at least one first photodiode operating in photovoltaic mode comprising a photovoltaic conversion area (2) defined by a doped area of a second type forming a PN junction with the substrate, said first photodiode re-emitting photoelectric charge carriers collected by the PN junction during the exposure of said first photodiode to a light, at least one second photodiode operating in integration mode and reverse-biased, said second photodiode comprising a charge accumulation area (3) defined by a doped area of the second type forming a PN junction with the substrate, said charge accumulation area being exposed to the charge carriers from the photovoltaic conversion area (2) in order to accumulate such charge carriers.

An imaging element includes a photoelectric conversion section and a wiring layer. The photoelectric conversion section is configured to photoelectrically convert light incident from a subject. The wiring layer is provided on an opposite side of the subject with respect to the photoelectric conversion section and includes a wire connected to an element that constitutes a pixel including the photoelectric conversion section. The wire includes a plurality of wires extending long in a predetermined direction. The plurality of wires are arranged in a direction almost perpendicular to the predetermined direction in the wiring layer. The wire is provided with a protrusion protruding in a direction different from the predetermined direction.