G06F17/50

APPLICATION LOGIC, AND VERIFICATION METHOD AND CONFIGURATION METHOD THEREOF

A verification method for an application logic provided with one or more macro logics configured to perform a predetermined operation, a macro operation control unit configured to instruct the one or more macro logics to start the operation to cause the one or more macro logics to perform the operation, and an operation data storage area configured to store data. In the application logic, static verification by property description of a formal verification language is performed for each of the one or more macro logic, the macro operation control unit, and the operation data storage area, and dynamic verification by simulation is further performed for at least one of the one or more macro logics.

WEAR INDICATOR FOR A WEAR MEMBER OF A TOOL
20170356165 · 2017-12-14 · ·

A wear indicator is provided for a wear member of a machine wherein the wear member is subject to wear during use of the machine. The wear indicator may include a plug member configured to be positioned in a region of the wear member subject to wear. The plug member may be oriented with a central axis extending in a direction substantially parallel to a direction of wear of the wear member. The wear indicator may include a plurality of perceptibly different and distinct axial cross sections taken perpendicular to the central axis of the plug member in axially spaced planes along the central axis.

INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING METHOD
20170357737 · 2017-12-14 · ·

The disclosure relates to information processing apparatus and information processing method. The information processing apparatus includes one or more processors configured for: acquiring a material characteristic of at least one portion of a target entity; matching the material characteristic of the target entity with a predetermined material characteristic, where the predetermined material characteristic is correlated with at least one portion of a three-dimensional model; and generating, based on a result of the matching, information indicative of a correlation between the portion of the target entity and the portion of the three-dimensional model.

DETERMINING CUMULATIVE WATER FLOW ON A GRID-BY-GRID BASIS IN A GEOCELLULAR EARTH MODEL
20170357739 · 2017-12-14 ·

Four-dimensional fluid flow data is received that is associated with a time dimension and I, J, and K dimensions. The four-dimensional fluid flow data includes, for each of plural time steps, a fluid flow amount for the respective time step and for a respective I, J, K cell. Using the four-dimensional fluid flow data and for each of plural time steps, a four-dimensional geocellular model is determined having I, J, K and t dimensions and indicating, for each I, J, K, t cell, an amount of a fluid flowing through the I, J, K cell for a respective time step t. A three-dimensional time-independent model is determined for the I, J, K cell. A two-dimensional time-independent model is determined that includes a cumulative fluid flow amount for each I, J cell.

Systems and Methods for Accessing Visually Obscured Elements of a Three-Dimensional Model
20170357405 · 2017-12-14 ·

A method provides access to visually obscured elements of a three-dimensional model on a screen of a computing device. The method displays, on the screen of the computing device, a view plane of the three-dimensional model showing at least one visible element. The at least one visible element at least partially obstructs at least one visually obstructed element of the three-dimensional model. The method also defines a region at a location on the screen associated with the at least one visible element of the three-dimensional model. In response to input relating to the region, the method superimposes a representation of the at least one visually obscured element over the view plane.

System and Method for Defining Watertight and Locally Refinable Surfaces with Interpolatory Control Points

A method for creating a watertight boundary between two graphical elements including the steps of displaying a first surface having a first shape and a second surface having a second shape on the display, an open space existing between the first surface and the second surface, defining a first region of the first surface, and defining a second region of the second surface, and modifying the first surface to a modified first surface such that the first region matches with the second region and the modified first surface and the second surface form a watertight connection at a modified first region and the second region, the step of modifying including geometrically matching the first region of the first surface with the second region of the second surface to establish the modified first region.

Method for Compensating Pattern Placement Errors Caused by Variation of Pattern Exposure Density in a Multi-Beam Writer
20170357153 · 2017-12-14 · ·

A method for compensating pattern placement errors during writing a pattern on a target in a charged-particle multi-beam exposure apparatus including a layout generated by exposing a plurality of beam field frames using a beam of electrically charged particles, wherein each beam field frame has a respective local pattern density, corresponding to exposure doses imparted to the target when exposing the respective beam field frames. During writing the beam field frames, the positions deviate from respective nominal positions because of build-up effects within said exposure apparatus, depending on the local pattern density evolution during writing the beam field frames. To compensate, a displacement behavior model is employed to predict displacements; a local pattern density evolution is determined, displacements of the beam field frames are predicted based on the local pattern density evolution and the displacement behavior model, and the beam field frames are repositioned accordingly based on the predicted values.

DYNAMIC MICROPROCESSOR GATE DESIGN TOOL FOR AREA/TIMING MARGIN CONTROL

A computer-implemented method for optimizing microprocessor gates in a microprocessor includes receiving, via a processor, a dataset comprising a model of a plurality of gates of a microprocessor; determining, via the processor, whether a transmission line in the model, if implemented in a physical circuit, would result a signal transmission time less than a predetermined threshold time; applying to the model, via the processor, a proposed gate change to one or more of the plurality of gates; evaluating, via the processor and an area degradation based on the proposed gate change; determining, via the processor, a margin value based on the signal transmission time and an area degradation value; and making, via the processor, a gate change decision based on the margin value.

CONTEXT AWARE CLOCK TREE SYNTHESIS
20170357746 · 2017-12-14 · ·

Systems and techniques are described for context aware clock tree synthesis (CTS). A probability value can be computed for each clock sink in the set of clock sinks, wherein each probability value represents a probability that the corresponding clock sink has a critical clock latency. Next, the set of clock sinks can be clustered into a set of clock sink clusters based on the probability values. An optimization goal for each clock sink cluster can be selected, and an optimized subtree can be constructed for each clock sink cluster based on the selected optimization goal. The synthesized clock tree can be obtained by combining the optimized subtrees.

EFFICIENT EMULATION OF CIRCUITS
20170357743 · 2017-12-14 ·

When a communication unit of an FPGA receives emulated signals of a design under test that are to be transmitted to another FPGA, the communication unit analyzes each signal to determine whether a signal event has occurred for the signal. The communication unit transmits to the other DUT FPGA a packet indicating for which signals a signal event has occurred. Subsequently, the communication unit transmits a packet for each signal for which an event has occurred.