A nitride semiconductor device includes a transistor having a semiconductor stacked body formed on a substrate, and a pn light-emitting body formed on the semiconductor stacked body. The semiconductor stacked body includes a first nitride semiconductor layer, and a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a bandgap wider than that of the first nitride semiconductor layer. The transistor includes: the semiconductor stacked body; a source electrode and a drain electrode formed away from each other on the semiconductor stacked body; and a gate electrode provided between the source electrode and the drain electrode and formed away from the source electrode and the drain electrode. The pn light-emitting body includes a p-type nitride semiconductor layer and an n-type nitride semiconductor layer to emit a light beam having an energy value higher than an electron trapping level existing in the semiconductor stacked body, in which the p-type nitride semiconductor layer of the pn light-emitting body is electrically connected to the gate electrode, and functions as a gate of the transistor.

Provided are a polyhedron of which the upper width is narrower than the lower width, a manufacturing method therefor, and a photoelectric conversion device comprising the same. The photoelectric conversion device comprises: a substrate; a polyhedron disposed on the substrate and of which the upper width is narrower than the lower width; and a semiconductor layer disposed on the polyhedron. The photoelectric conversion device to which the polyhedron, of which the upper width is narrower than the lower width, is applied can have improved photoelectric conversion efficiency due to structural characteristics of the polyhedron.

An LED element is provided with: a first semiconductor layer formed of an n-type nitride semiconductor; a second semiconductor layer formed on top of the first semiconductor layer and formed of quaternary mixed crystals of Al.sub.x1Ga.sub.y1In.sub.z1N (0<x1<1, 0<y1<1, 0<z1<1 and x1+y1+z1=1); a heterostructure formed on top of the second semiconductor layer and constituted of a laminate structure of a third semiconductor layer formed of In.sub.x2Ga.sub.1-x2N (0<x2<1) having a film thickness of greater than or equal to 10 nm, and a fourth semiconductor layer formed of Al.sub.x3Ga.sub.y3In.sub.z3N (0<x3<1, 0<y3<1, 0z3<1 and x3+y3+z3=1); and a fifth semiconductor layer formed on top of the heterostructure and formed of a p-type nitride semiconductor.

A display device with improved light-emitting efficiency is disclosed. The display device includes a plurality of pixels, a light emitting device provided in each of the pixels, the light emitting device having first and second surfaces which are opposite to each other, first and second electrodes electrically and respectively connected to the first and second surfaces of the light emitting device, and a metal oxide pattern interposed between the second surface of the light emitting device and the second electrode. The metal oxide pattern includes first and second regions. The first region encloses the second region, and the second region has a contact hole exposing at least a portion of the second surface. The second electrode is coupled to the second surface through the contact hole, and the first and second regions have crystalline phases different from each other.

A display device with improved light-emitting efficiency is disclosed. The display device includes a plurality of pixels, a light emitting device provided in each of the pixels, the light emitting device having first and second surfaces which are opposite to each other, first and second electrodes electrically and respectively connected to the first and second surfaces of the light emitting device, and a metal oxide pattern interposed between the second surface of the light emitting device and the second electrode. The metal oxide pattern includes first and second regions. The first region encloses the second region, and the second region has a contact hole exposing at least a portion of the second surface. The second electrode is coupled to the second surface through the contact hole, and the first and second regions have crystalline phases different from each other.

An infrared LED element includes: a conductive support substrate; and a semiconductor laminate and includes a material that can be lattice-matched with InP, in which the semiconductor laminate includes: a first semiconductor layer indicating a first conductivity type; an active layer disposed on an upper layer of the first semiconductor layer; a second semiconductor layer disposed on an upper layer of the active layer and indicating a second conductivity type; and a third semiconductor layer disposed on an upper layer of the second semiconductor layer and contains Al.sub.aGa.sub.bIn.sub.cAs indicating the second conductivity type, the third semiconductor layer has an uneven part on a surface opposite to a side on which the second semiconductor layer is positioned, and the third semiconductor layer has band gap energy lower than band gap energy of the second semiconductor layer and higher than band gap energy of the active layer.

A transistor can include a substrate, an epitaxial oxide layer on the substrate, and a gate layer. The substrate can include a first crystalline material. The epitaxial oxide layer can include a second oxide material including: Li and one of Ni, Al, Ga, Mg, Zn and Ge; or Ni and one of Li, Al, Ga, Mg, Zn and Ge; or Mg and one of Ni, Al, Ga, and Ge; or Zn and one of Ni, Al, Ga, and Ge. The gate layer can include a third oxide material. A bandgap of the third oxide material of the gate can be wider than a bandgap of the second oxide material of the epitaxial oxide layer. The transistor can also include a source electrical contact coupled to the epitaxial oxide layer, a drain electrical contact coupled to the epitaxial oxide layer, and a first gate electrical contact coupled to the gate layer.

The techniques described herein relate to a semiconductor structure including: a substrate, or a single crystal growth surface, including single crystal 4H-SiC(0001); a buffer layer on the single crystal growth surface; and an epitaxial oxide layer on the buffer layer. The buffer layer can include a crystal symmetry type that is compatible with the single crystal 4H-SiC(0001). The epitaxial oxide layer can include single crystal (Al.sub.xGa.sub.1-x).sub.2O.sub.3 with a monoclinic or corundum crystal symmetry, and where 0x1.

Provided is a nanorod light-emitting device including a support layer, a first-type semiconductor nanocore protruding from an upper surface of the support layer and including a semiconductor material doped as a first conductivity type, a mask layer on an upper surface of the support layer and extending to a first height of the first-type semiconductor nanocore in a vertical direction and adjacent to a surface of the first-type semiconductor nanocore, a light-emitting layer having a multi-quantum well structure adjacent to a portion of the first-type semiconductor nanocore above the first height in the vertical direction, and a second-type semiconductor layer adjacent to a surface of the light-emitting layer and including a semiconductor material doped as a second conductivity type.

A display device may include a light emitting element including a first end having a first surface, and a second end having a second surface parallel to the first surface, an organic pattern that overlaps the light emitting element and exposes the first and second surfaces, a first electrode disposed on a substrate and electrically contacting the first end, and a second electrode disposed on the substrate and spaced apart from the first electrode, and electrically contacting the second end. A surface area of the first surface may be less than that of the second surface. A top surface of the organic pattern may be a curved surface.