Provided are liquid crystal display and the method for manufacturing the same. According to an aspect of the present invention, there is provided a liquid crystal display device, including a first substrate; a gate electrode disposed on the first substrate; a semiconductor pattern layer disposed on the gate electrode; and a source electrode and a drain electrode disposed on the semiconductor pattern layer and facing each other, wherein a diffusion prevention pattern is disposed on the semiconductor pattern layer to prevent diffusion into the semiconductor pattern layer or to maintain uniform thickness of the semiconductor pattern layer.

One or more exemplary embodiments disclose a thin film transistor array panel and a manufacturing method thereof including a substrate, a gate line on the substrate, the gate line including a gate electrode, a gate insulating layer on the gate electrode, a semiconductor layer on the gate insulating layer, and the semiconductor layer including an oxide semiconductor, a data wire layer above the semiconductor layer, the data wire layer including a data line, a source electrode coupled to the data line, and a drain electrode facing the source electrode, and a metal phosphorus oxide layer configured to cover the source electrode and the drain electrode.

A method of forming a patterned metal film layer and preparation methods of a transistor and an array substrate are disclosed, in the technical field of displays. The method of forming a patterned metal film layer of the invention comprises: sequentially depositing a sacrificial layer and a photoresist layer on a substrate, and forming a patterned sacrificial layer and a patterned photoresist layer overlying on the patterned sacrificial layer by exposure, development, and etching, wherein a side wall of the patterned sacrificial layer adjacent to a patterned metal film layer to be formed forms a chamfer; depositing a metal film layer on the substrate after finishing the above step, and removing the patterned photoresist layer and the sacrificial layer to form a patterned metal film layer.

A display substrate includes a pixel switching element, a pixel electrode, a reference line, a control switching element, a bias line, a light sensing element, a sensing capacitor and a light blocking filter pattern. The pixel switching element is connected to a data line and a gate line, includes a first semiconductor pattern. The pixel electrode is connected to the pixel switching element. The reference line is in parallel with the data line. The control switching element is connected to the reference line and the gate line, includes a second semiconductor pattern. The bias line is in parallel with the gate line. The light sensing element is connected to the bias line and the control switching element, includes a third semiconductor pattern. The sensing capacitor is connected to the light sensing element and a storage line. The light blocking filter pattern transmits a first light, and blocks a second light.

Methods and apparatuses for delaminating workpieces are provided. In one or more aspects, a method can include processing or otherwise delaminating the workpiece by separating a delamination stack and a support substrate disposed thereon. The workpiece that can include a sacrificial layer disposed between the delamination stack and the support substrate. The method can include exposing at least a portion of the workpiece to an electrolyte solution, applying an electrical current through the sacrificial layer and the electrolyte solution, selectively removing the electrically conductive or semiconductive material from the sacrificial layer during an etching process, and separating the delamination stack and the support substrate one from the other. The delamination stack can include a process piece that can be one or more wafers or devices (e.g., thin-film devices) or one or more portions of the one or more wafers or devices.

Methods of fabricating a thin-film transistor are provided. The methods include forming a gate electrode above a substrate, a gate insulating layer above the gate electrode, a non-crystalline silicon layer above the gate insulating layer, and a channel protective layer above the non-crystalline silicon layer. The non-crystalline silicon layer and the channel protective layer are processed to form a projecting part. The projecting part has an upper layer composed of the channel protective layer and a lower layer composed of the non-crystalline silicon layer. The projecting part and portions of the non-crystalline silicon layer on sides of the projecting part are irradiated with a laser beam to crystallize at least the non-crystalline silicon layer in the projecting part. An absorptance of the non-crystalline silicon layer for the laser beam is greater in the projecting part than in the portions on the sides of the projecting part.

A manufacturing method of a thin film transistor array panel according to an exemplary embodiment of the present invention includes forming an amorphous silicon thin film on a substrate. A lower region of the amorphous silicon thin film is crystallized to form a polycrystalline silicon thin film by irradiating a laser beam with an energy density of from about 150 mj/cm.sup.2 to about 250 mj/cm.sup.2 to the amorphous silicon thin film.

A reduction in contaminating impurities in a TFT, and a TFT which is reliable, is obtained in a semiconductor device which uses the TFT. By removing contaminating impurities residing in a film interface of the TFT using a solution containing fluorine, a reliable TFT can be obtained.

The disclosure is related to a thin film transistor and a method of manufacturing the thin film transistor. The thin film transistor comprises a substrate, a gate, a gate insulation layer, a first semiconductor layer, an etch stop layer and a second semiconductor layer sequentially stacked on a surface of the substrate, and a source and a drain formed separating from each other and the source and the drain overlapping two ends of the second semiconductor layer respectively. A first via and a second via are formed on the etch stop layer corresponding to the source and the drain respectively. The source connects the first semiconductor layer through the first via; the drain connects the first semiconductor layer through the second via. The thin film transistor of the disclosure can effectively increase the on-state current of the thin film transistor and have a faster switching speed.

A thin film transistor (TFT) substrate in which properties of a TFT may be modified according to a function of the TFT, a display apparatus including the TFT substrate, a method of manufacturing the TFT substrate, and a method of manufacturing the display apparatus. The thin film transistor (TFT) substrate includes a substrate; a first TFT disposed on the substrate and comprising a first active pattern and a first gate electrode at least partially overlapping with the first active pattern and disposed between the substrate and the first active pattern; and a second TFT disposed on the substrate and comprising a second active pattern and a second gate electrode at least partially overlapping with the second active pattern.