To provide a highly reliable semiconductor device that is suitable for miniaturization and an increase in density. The semiconductor device includes a first insulator over a substrate, a transistor including an oxide semiconductor over the first insulator, a second insulator over the transistor, and a third insulator over the second insulator. The first insulator and the third insulator have a barrier property with respect to oxygen and hydrogen. The second insulator includes an excess-oxygen region. The transistor is enclosed with the first insulator and the third insulator that are in contact with each other in an edge of a region where the transistor is positioned.

The present invention provides a TFT substrate structure and a manufacturing method thereof. In the manufacturing method of a TFT substrate structure according to present invention, a graphene layer is formed on a semiconductor layer and after the formation of a second metal layer, the second metal layer is used as a shielding mask to conduct injection of fluoride ions into the graphene layer to form a modified area in a portion of the graphene layer that is located on and corresponds to a channel zone of the semiconductor layer, wherein the modified area of the graphene layer shows a property of electrical insulation and a property of blocking moisture/oxygen so as to provide protection to the channel zone; portions of the graphene layer that are located under source and drain electrodes are not doped with ions and preserves the excellent electrical conduction property of graphene and thus electrical connection between the source and drain electrodes and the semiconductor layer can be achieved without formation of a via in the graphene layer, making a TFT device so manufactured showing excellent I-V (current-voltage) output characteristics and stability, saving one mask operation process, shortening the manufacturing time, and lowering down the manufacturing cost.

A field-effect transistor includes a gate electrode, a source electrode and a drain electrode to take out electric current according to an application of a voltage to the gate electrode, a semiconductor layer disposed adjacent to the source electrode and the drain electrode, the semiconductor layer forming a channel between the source electrode and the drain electrode, a first insulating layer as gate insulating film disposed between the semiconductor layer and the gate electrode, and a second insulating layer covering at least a part of a surface of the semiconductor layer, the second insulating layer including an oxide including silicon and alkaline earth metal.

The present disclosure provides a pixel unit and a method for producing the same, an array substrate and a display apparatus. The pixel unit includes: a thin film transistor; an insulation layer formed at least on a drain electrode of the thin film transistor and formed therein with a via hole which extends through the insulation layer to expose the drain electrode of the thin film transistor below the insulation layer; a pixel electrode formed on the insulation layer and electrically connected to the drain electrode of the thin film transistor at the via hole; and at least one elevating layer formed below the via hole and located below a part of the drain electrode exposed from the via hole such that the exposed part has a height greater than the height of the parts of the drain electrode adjacent to the exposed part. The depth and slope of the via hole is reduced by adding the elevating layer below the via hole. The elevating layer may be made from the gate metal layer and/or the active layer that are not etched off in process without increasing any production cost and process difficulty.

A thin film transistor, a manufacturing method thereof and an array substrate are provided. The thin film transistor comprises: a gate electrode (11), a source electrode (15) and a drain electrode (16), and the thin film transistor further comprises a buffer layer (11) which is directly provided at one side or both sides of at least one of the gate electrode (11), the source electrode (15) and the drain electrode (16), wherein, the buffer layer (11) and at least one of the gate electrode (11), the source electrode (15) and the drain electrode (16) directly contacting the buffer layer (11) are conformal. Therefore, the adhesion between an electrode of the thin film transistor and a film layer contacting it is improved and at the same time an atom in the electrode of the thin film transistor is effectively prevented from diffusing to the film layer connected with it, and the reliability of the thin film transistor is improved and the production cost is reduced.

A display panel comprises a TFT substrate and a display medium layer. The display medium layer is disposed on the TFT substrate. The TFT substrate comprises a TFT and a substrate. The TFT is disposed on the substrate and comprises a gate, a metal oxide layer, a source, a drain and a protection layer. The gate is disposed corresponding to the metal oxide layer. The protection layer is disposed on the metal oxide layer. Each of the source and the drain contacts the metal oxide layer through an opening of the protection layer. One side of the gate or one side of the metal oxide layer partially overlaps at least one of the openings. In addition, a display device is also disclosed.

The present disclosure relates to the field of display technology, and provides a TFT, its manufacturing method and a display device. A first region of an active layer of the TFT corresponding to a gap between a source electrode and a drain electrode includes a metallic oxide semiconductor layer and a silicon semiconductor layer arranged on the metallic oxide semiconductor layer. The source electrode and the drain electrode are directly lapped onto the active layer.

As a display device has higher definition, the number of pixels is increased and thus, the number of gate lines and signal lines is increased. When the number of gate lines and signal lines is increased, it is difficult to mount IC chips including driver circuits for driving the gate lines and the signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided on the same substrate, and at least part of the driver circuit comprises a thin film transistor including an oxide semiconductor sandwiched between gate electrodes. A channel protective layer is provided between the oxide semiconductor and a gate electrode provided over the oxide semiconductor. The pixel portion and the driver circuit are provided on the same substrate, which leads to reduction of manufacturing cost.

The present invention generally relates to a method of manufacturing a TFT. The TFT has an active channel that comprises IGZO or zinc oxide. After the source and drain electrodes are formed, but before the passivation layers or etch stop layers are deposited thereover, the active channel is exposed to an N.sub.2O or O.sub.2 plasma. The interface between the active channel and the passivation layers or etch stop layers are either altered or damaged during formation of the source and drain electrodes. The N.sub.2O or O.sub.2 plasma alters and repairs the interface between the active channel and the passivation or etch stop layers.

To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.