Patent classifications
H10D30/6704
Deep gate-all-around semiconductor device having germanium or group III-V active layer
Deep gate-all-around semiconductor devices having germanium or group III-V active layers are described. For example, a non-planar semiconductor device includes a hetero-structure disposed above a substrate. The hetero-structure includes a hetero-junction between an upper layer and a lower layer of differing composition. An active layer is disposed above the hetero-structure and has a composition different from the upper and lower layers of the hetero-structure. A gate electrode stack is disposed on and completely surrounds a channel region of the active layer, and is disposed in a trench in the upper layer and at least partially in the lower layer of the hetero-structure. Source and drain regions are disposed in the active layer and in the upper layer, but not in the lower layer, on either side of the gate electrode stack.
THIN FILM TRANSISTOR SUBSTRATE HAVING STACKED PASSIVATION LAYERS
A thin film transistor substrate includes a gate electrode disposed on a base substrate, an active pattern overlapping the gate electrode, a source metal pattern including both a source electrode disposed on the active pattern and a drain electrode spaced apart from the source electrode, a buffer layer disposed on the source metal pattern and contacting the active pattern, a first passivation layer disposed on the buffer layer and a second passivation layer disposed on the first passivation layer. The density of hydrogen in the buffer layer is greater than the density of hydrogen in the first passivation layer and less than the density of hydrogen in the second passivation layer.
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.
THIN FILM TRANSISTOR SUBSTRATE, DISPLAY DEVICE INCLUDING A THIN FILM TRANSISTOR SUBSTRATE, AND METHOD OF FORMING A THIN FILM TRANSISTOR SUBSTRATE
Provided are a thin film transistor (TFT) substrate, a display device, and a method of forming the TFT. A TFT substrate includes: a first TFT including: a polycrystalline semiconductor (PS) layer, a first gate electrode (GE) overlapping the PS layer, a nitride layer (NL) on the first GE, an oxide layer (OL) on the NL, and a first source electrode and a first drain electrode on the OL, and a second TFT including: a second GE on a same layer as the first GE, a hydrogen collecting layer between the second GE and the NL, an oxide semiconductor (OS) layer on the OL, a second source electrode and a second drain electrode contacting respective sides of the OS layer, wherein the first TFT and the second TFT are disposed on a same substrate, and wherein the NL includes an opening exposing the hydrogen collecting layer of the second TFT.
Method for manufacturing assembly of flexible display device and assembly of flexible display device manufactured with same
The present invention provides a method for manufacturing an assembly of a flexible display device and an assembly of a flexible display device manufactured therewith. The method includes: (1) providing a flexible base (22); (2) forming a graphene layer (24) on the flexible base (22); (3) forming a protective layer (26) on the graphene layer (24); (4) forming a low-temperature polysilicon layer (28) on the protective layer (26). The method for manufacturing an assembly of a flexible display device and the assembly of the flexible display device manufactured therewith according to the present invention are such that the graphene layer is formed on the flexible base to effectively conduct out heat generated in the process of forming the low-temperature polysilicon layer so as to protect the flexible base from being affected by the heat without increasing the thickness of the protective layer thereby reducing internal stress and facilitating the realization of thinning.
Semiconductor device comprising oxide semiconductor
To suppress change in electric characteristics and improve reliability of a semiconductor device including a transistor formed using an oxide semiconductor. A semiconductor device includes a transistor including a gate electrode, a first insulating film, an oxide semiconductor film, a second insulating film, and a pair of electrodes. The gate electrode and the oxide semiconductor film overlap with each other. The oxide semiconductor film is located between the first insulating film and the second insulating film and in contact with the pair of electrodes. The first insulating film is located between the gate electrode and the oxide semiconductor film. An etching rate of a region of at least one of the first insulating film and the second insulating film is higher than 8 nm/min when etching is performed using a hydrofluoric acid.
Semiconductor device and method for manufacturing thereof
A transistor that is formed using an oxide semiconductor film is provided. A transistor that is formed using an oxide semiconductor film with reduced oxygen vacancies is provided. A transistor having excellent electrical characteristics is provided. A semiconductor device includes a first insulating film, a first oxide semiconductor film, a gate insulating film, and a gate electrode. The first insulating film includes a first region and a second region. The first region is a region that transmits less oxygen than the second region does. The first oxide semiconductor film is provided at least over the second region.
Thin film transistor array substrate and liquid crystal display panel using same
A thin film transistor (TFT) array substrate of a liquid crystal display (LCD) panel includes a first substrate, a gate located on the first substrate, a gate insulation layer located on the first substrate and covers the gate and the first substrate, a source layer located on the gate insulation layer to correspond to the gate, an etching stopping layer located on the source layer, and a source and a drain located on the etching stopping layer. The etching stopping layer is made of color photoresist.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a transistor including a gate electrode over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, and an oxide insulating film covering the transistor. The multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film contains more oxygen than that in the stoichiometric composition, and in the transistor, by a bias-temperature stress test, threshold voltage does not change or the amount of the change in a positive direction or a negative direction is less than or equal to 1.0 V, preferably less than or equal to 0.5 V.
LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
Provided are liquid crystal display and the method for manufacturing the same. According to an aspect of the present invention, there is provided a liquid crystal display device, including a first substrate; a gate electrode disposed on the first substrate; a semiconductor pattern layer disposed on the gate electrode; and a source electrode and a drain electrode disposed on the semiconductor pattern layer and facing each other, wherein a diffusion prevention pattern is disposed on the semiconductor pattern layer to prevent diffusion into the semiconductor pattern layer or to maintain uniform thickness of the semiconductor pattern layer.