According to an embodiment, a semiconductor memory device comprises: a plurality of control gate electrodes stacked above a substrate; a first semiconductor layer extending in a first direction above the substrate and facing the plurality of control gate electrodes; a gate insulating layer extending in the first direction and provided between the control gate electrode and first semiconductor layer; and a second semiconductor layer positioned downwardly of the first semiconductor layer and gate insulating layer, and connected to a lower end of the first semiconductor layer and the substrate. Moreover, the first semiconductor layer comprises: a first portion contacting an upper surface of the second semiconductor layer at a position more downward than a lower end of the gate insulating layer; and a second portion connected to an upper end of the first portion, extending in the first direction, and having a different crystalline structure from the first portion.

A semiconductor memory device according to the embodiment includes a substrate, electrodes, at least one pillar structure, at least one charge storage film, and at least one insulating member. The electrodes are provided on the substrate, are separately stacked each other, and constitute a stacked body. The electrodes have a first width in a first direction along a surface of the substrate and include a portion extending in a second direction crossing the first direction along the surface. The pillar structure is provided in the stacked body and includes a semiconductor layer extending in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor layer and the electrodes. The insulating member has a width in the first direction smaller than the first width, pierces the electrodes, and is provided to extend in the stacking direction.

A semiconductor memory device according to an embodiment comprises: a semiconductor substrate; a semiconductor layer provided extending in a first direction above the semiconductor substrate, on the semiconductor substrate; a first insulating layer provided on a side surface of the semiconductor layer; a charge accumulation layer provided on a side surface of the first insulating layer; a block insulating layer provided on a side surface of the charge accumulation layer; and a plurality of conductive layers stacked in the first direction via an insulating layer, in a periphery of the block insulating layer. The block insulating layer includes: a first block insulating layer; and a second block insulating layer that has a permittivity which is higher than that of the first block insulating layer. A lower end of the second block insulating layer is positioned more upwardly than a lower end of the first insulating layer.

A semiconductor memory device includes a first structural body, a second structural body and interconnections. The first and the second structural bodies are separated in a first direction and extend in a second direction. The interconnections are provided between the first structural body and the second structural body, extend in the second direction, and are separated from each other along a third direction. The first and the second structural bodies each includes an insulating member, a column-shaped body and an insulating film. The insulating member and the column-shaped body are disposed in an alternating manner along the second direction and extend in the third direction. The insulating members of the first and second structural bodies make contact with the interconnections.

According to the embodiment, a semiconductor device includes: a substrate; a stacked body provided on the substrate and including a plurality of electrode layers stacked with an insulator interposed; a semiconductor pillar provided on the substrate and in the stacked body; a semiconductor body provided in the stacked body; and an insulating film including a charge storage film provided between the plurality of electrode layers and the semiconductor body, and extending in the stacking direction. The semiconductor body includes a first portion and a second portion. The first portion is surrounded with the plurality of electrode layers and extends in a stacking direction of the stacked body. The second portion is in contact with an upper surface of the semiconductor pillar.

A semiconductor memory device according to one embodiment, includes a first electrode film, a plurality of semiconductor members, and a charge storage member. The first electrode film includes three or more first portions and a second portion connecting the first portions to each other. The first portions extend in a first direction and are arranged along a second direction that intersects with the first direction. The plurality of semiconductor members are arranged along the first direction between the first portions and extending in a third direction. The third direction intersects with a plane containing the first direction and the second direction. The charge storage member is disposed between each of the semiconductor members and each of the first portions. The second portion is disposed between the semiconductor members.

According to one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes forming a second film on the first film. The method further includes simultaneously flowing a first gas with a second gas containing a metal element to form a first opening in the second film and forming a third film containing the metal element on a side surface of the first opening. The method further includes forming a second opening in the first film below the first opening using the second film as a mask.

According to one embodiment, a stacked body includes a plurality of metal layers stacked with an insulator interposed. A semiconductor body extends in a stacking direction through the stacked body. A charge storage portion is provided between the semiconductor body and one of the metal layers. A metal nitride film has a first portion and a second portion. The first portion is provided between the charge storage portion and one of the metal layers. The second portion is thicker than the first portion and is provided between one of the metal layers and the insulator.

There are provided a memory device and a manufacturing method thereof. A method of manufacturing a memory device may include forming, on a substrate, a conductive layer, a sacrificial layer, and a stack structure. The method may include forming a plurality of vertical holes by etching a portion of the stack structure. The method may include forming a memory layer and a channel layer along internal surfaces of the vertical holes. The method may include forming a slit trench exposing a portion of the sacrificial layer therethrough by etching a portion of the stack structure between the vertical holes. The method may include exposing a portion of the channel layer and the first conductive layer through a lower portion of the stack structure by removing portions of the sacrificial layer and the memory layer. The method may include forming another conductive layer along surfaces of the exposed portion of the channel layer and the first conductive layer. The method may include forming a slit insulating layer in the slit trench.

According to one embodiment, a semiconductor device includes a substrate and a semiconductor layer. The device further includes a first electrode layer that is provided on a side surface of the semiconductor layer with a first insulating film interposed therebetween. The device further includes a charge storage layer provided on a side surface of the first electrode layer with the second insulating film interposed therebetween.