A bipolar junction transistor has a collector over a substrate and a multi-layer base structure over the collector, and an emitter over the base structure. The multi-layer base structure includes a first layer having a first III-V semiconductor alloy and a second layer having a second III-V semiconductor alloy having a different composition of elements than the first III-V semiconductor alloy. The second layer has a narrower bandgap than the first layer. The first layer is positioned between the collector and the second layer.

A symmetrically-bidirectional bipolar transistor circuit where the two base contact regions are clamped, through a low-voltage diode and a resistive element, to avoid bringing either emitter junction to forward bias. This avoids bipolar gain in the off state, and thereby avoids reduction of the withstand voltage due to bipolar gain.

A SiGe HBT has an inverted heterojunction structure, where the emitter layer is formed prior to the base layer and the collector layer. The frequency performance of the SiGe HBT is significantly improved through a better thermal process budget for the base profile, essential for higher cut-off frequency (f.sub.T) and a minimal collector-base area for a reduced parasitic capacitance, essential for higher maximum oscillation frequency (f.sub.max). This inverted heterojunction structure can be fabricated by using ALE processes to form an emitter on a preformed epitaxial silicide, a base over the emitter and a collector over the base.

According to one embodiment, a semiconductor device includes an n-type semiconductor layer, a first electrode, and a nitride semiconductor layer. The n-type semiconductor layer includes diamond. The nitride semiconductor layer is provided between the n-type semiconductor layer and the first electrode. The nitride semiconductor layer includes Al.sub.xGa.sub.1xN (0x1) and is of n-type.

A semiconductor structure includes a heterojunction bipolar transistor (HBT) including a collector layer located over a substrate, the collector layer including a semiconductor material, and a field effect transistor (FET) located over the substrate, the FET having a channel formed in the semiconductor material that forms the collector layer of the HBT. In some implementations, a second FET can be provided so as to be located over the substrate and configured to include a channel formed in a semiconductor material that forms an emitter of the HBT. One or more of the foregoing features can be implemented in devices such as a die, a packaged module, and a wireless device.

Heterostructure and double-heterostructure trench-gate devices, in which the substrate and/or the body are constructed of a narrower-bandgap semiconductor material than the uppermost portion of the drift region. Fabrication most preferably uses a process where gate dielectric anneal is performed after all other high-temperature steps have already been done.

Methods, devices, and systems for using and forming vertically base-connected bipolar transistors have been shown. The vertically base-connected bipolar transistors in the embodiments of the present disclosure are formed with a CMOS fabrication technique that decreases the transistor size while maintaining the high performance characteristics of a bipolar transistor.

A transistor includes a semiconductor substrate comprising a first region and a second region. The transistor further includes an emitter and a base disposed on the first region, and a collector disposed on the second region. The emitter includes a heterojunction. The heterojunction is at a same height as a junction between two different insulating materials that separate the emitter and the base.

A semiconductor device includes a heterojunction bipolar transistor (HBT) having a collector, a base, and an emitter. The base includes a monocrystalline base layer, including silicon-germanium, on the collector, and an extrinsic base layer, including polycrystalline silicon, extending partway over the monocrystalline base layer. The base further includes a base link, including polycrystalline silicon-germanium, connecting the monocrystalline base layer to the extrinsic base layer. An emitter spacer, of dielectric material, laterally separates the emitter from the extrinsic base layer. The HBT has a spacer-extrinsic base vertical offset between a bottom of the emitter spacer and a bottom surface of the extrinsic base layer adjacent to the emitter spacer. The emitter spacer has a bottom width at a bottom of the emitter spacer. A sum of the spacer-extrinsic base vertical offset and the bottom width of the emitter spacer is greater than the thickness of the monocrystalline base layer.

Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. The structure comprises an emitter, a collector including a first section, a second section, and a third section positioned in a first direction between the first section and the second section, and an intrinsic base disposed in a second direction between the emitter and the third section of the collector. The structure further comprises a stress layer including a section positioned to overlap with the emitter, the intrinsic base, and the collector. The section of the stress layer is surrounded by a perimeter, and the first and second sections of the collector are each positioned adjacent to the perimeter of the stress layer.