H10D30/6706

Liquid crystal display device and electronic device including the same

A liquid crystal display device is provided in which the aperture ratio can be increased in a pixel including a thin film transistor in which an oxide semiconductor is used. In the liquid crystal display device, the thin film transistor including a gate electrode, a gate insulating layer and an oxide semiconductor layer which are provided so as to overlap with the gate electrode, and a source electrode and a drain electrode which overlap part of the oxide semiconductor layer is provided between a signal line and a pixel electrode which are provided in a pixel portion. The off-current of the thin film transistor is 110.sup.13 A or less. A potential can be held only by a liquid crystal capacitor, without a capacitor which is parallel to a liquid crystal element, and a capacitor connected to the pixel electrode is not formed in the pixel portion.

OXIDE SINTERED BODY AND METHOD FOR MANUFACTURING THE SAME, SPUTTERING TARGET, AND SEMICONDUCTOR DEVICE

There is provided an oxide sintered body including indium, tungsten and zinc, wherein the oxide sintered body includes a bixbite type crystal phase as a main component and has an apparent density of higher than 6.5 g/cm.sup.3 and equal to or lower than 7.1 g/cm.sup.3, a content rate of tungsten to a total of indium, tungsten and zinc is higher than 1.2 atomic % and lower than 30 atomic %, and a content rate of zinc to the total of indium, tungsten and zinc is higher than 1.2 atomic % and lower than 30 atomic %. There are also provided a sputtering target including this oxide sintered body, and a semiconductor device including an oxide semiconductor film formed by a sputtering method by using the sputtering target.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20170025543 · 2017-01-26 ·

An insulator is formed over a substrate, an opening is formed in the insulator, and an oxide semiconductor is formed in the opening. Then, part of the insulator is removed to expose a side surface of the oxide semiconductor.

Wiring Layer And Manufacturing Method Therefor

To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.

SEMICONDUCTOR DEVICE

A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor. One or more of the first to third conductors include a region containing tungsten and one or more elements selected from silicon, carbon, germanium, tin, aluminum, and nickel.

Radio frequency isolation for SOI transistors
09548351 · 2017-01-17 · ·

According to one example embodiment, a structure includes at least one SOI (semiconductor-on-insulator) transistor situated over a buried oxide layer, where the buried oxide layer overlies a bulk substrate. The structure further includes an electrically charged field control ring situated over the buried oxide layer and surrounding the at least one SOI transistor. A width of the electrically charged field control ring is greater than a thickness of the buried oxide layer. The electrically charged field control ring reduces a conductivity of a surface portion of the bulk substrate underlying the field control ring, thereby reducing RF coupling of the at least one SOI transistor through the bulk substrate. The structure further includes an isolation region situated between the electrically charged field control ring and the at least one SOI transistor. A method to achieve and implement the disclosed structure is also provided.

Field-effect transistor including oxide semiconductor, and memory and semiconductor circuit including the same

Provided is a field-effect transistor (FET) having small off-state current, which is used in a miniaturized semiconductor integrated circuit. The field-effect transistor includes a thin oxide semiconductor which is formed substantially perpendicular to an insulating surface, a gate insulating film formed to cover the oxide semiconductor, and a gate electrode which is formed to cover the gate insulating film. The gate electrode partly overlaps a source electrode and a drain electrode. The source electrode and the drain electrode are in contact with at least a top surface of the oxide semiconductor. In this structure, three surfaces of the thin oxide semiconductor are covered with the gate electrode, so that electrons injected from the source electrode or the drain electrode can be effectively removed, and most of the space between the source electrode and the drain electrode can be a depletion region; thus, off-state current can be reduced.

Semiconductor device and method for manufacturing the same

An object is to provide a structure of a transistor which has a channel formation region formed using an oxide semiconductor and a positive threshold voltage value, which enables a so-called normally-on switching element. The transistor includes an oxide semiconductor stack in which at least a first oxide semiconductor layer and a second oxide semiconductor layer with different energy gaps are stacked and a region containing oxygen in excess of its stoichiometric composition ratio is provided.

THIN-FILM TRANSISTOR SUBSTRATE AND DISPLAY DEVICE COMPRISING THE SAME

A thin-film transistor substrate and a display device comprising the same are provided which can improve display quality by reducing or preventing deterioration of the characteristics of thin-film transistors. The thin-film transistor substrate comprises thin-film transistors on a lower protective metal layer. Each thin-film transistor comprises a buffer layer, a semiconductor layer, a first insulating film, a gate electrode, a second insulating film, a source electrode and a drain electrode, and a first electrode. The lower protective metal layer is electrically connected to the gate electrode and overlaps the channel region of the semiconductor layer.

Thin film semiconductor device
09536907 · 2017-01-03 · ·

According to one embodiment, provided is a thin film transistor with which it is possible to reduce the leakage current and thereby, for a liquid crystal display device, to ensure a good display quality. The thin film transistor includes a semiconductor layer, gate electrodes, first light-blocking electrodes, and second light-blocking electrodes. The first light-blocking electrodes are disposed opposite to the gate electrodes with respect to the semiconductor layer and opposed to channel regions to block light incident into the channel regions. The second light-blocking electrodes are disposed opposite to the semiconductor layer with respect to the gate electrodes, arranged to block light incident into the channel regions, and electrically connected with one of a signal line and a pixel electrode.