A superconductor tape includes a plurality of conductive strips having respective long directions parallel to a long tape direction of the superconductor tape, where each of the plurality of conductive strips separated from one another by a inter-strip region. The superconductor tape further includes a superconductor layer disposed adjacent the plurality of conductive strips, having a length along the long tape direction, where the superconductor layer comprises a plurality of superconductor strips disposed under the respective plurality of conductive strips, and a non-superconductor strip disposed adjacent the inter-strip region.

Disclosed is a method to modify the superconductive properties of a potentially or effectively superconductive material. The method includes providing a reflective or photonic structure and placing said superconductive material in or on the structure. The method also includes providing a structure which has an electromagnetic mode which is resonant with a transition in the material and controlling, in particular enhancing, the superconductivity, and thus the mobility of the charge carriers. This results in a higher operating temperature and an increased electrical current in the material, by means of strongly coupling the material to the local electromagnetic vacuum field and exploiting the formation of states of spatial extension corresponding to the mode volume of the electromagnetic resonance. Also disclosed is an electronic, electro-optical or optoelectronic device including superconductive material located in or on a reflective or photonic structure.

This disclosure describes a superconducting device comprising a trench and a cavity that extends through a superconducting base layer. The trench crosses the cavity. The superconducting device further comprises a first junction layer that extends from a first region of the superconducting base layer to the cavity, an insulating layer on the surface of the first junction layer, and a second junction layer that extends from a second region of the superconducting base layer to the cavity. The second junction layer overlaps with the insulating layer on the bottom of the cavity. The disclosure also describes a method for producing this disclosed superconducting device.

A process for fabricating an electronic component incorporating double quantum dots and split gates includes providing a substrate surmounted with a stack of a semiconductor layer and of a dielectric layer that is formed above the semiconductor layer. The process also includes forming a mask on the dielectric layer and etching the dielectric layer and the semiconductor layer with the pattern of the mask, so as to form a stack of a semiconductor nanowire and of a dielectric hard mask. Finally, the process includes depositing a gate material on all of the wafer and carrying out a planarization, until the dielectric hard mask is reached, so as to form first and second gates that are electrically insulated from each other on either side of said nanowire.

An electronic device (e.g., a diode) is provided that includes a substrate and a patterned layer of superconducting material disposed over the substrate. The patterned layer forms a first electrode, a second electrode, and a loop coupling the first electrode with the second electrode by a first channel and a second channel. The first channel and the second channel have different minimum widths. For a range of current magnitudes, when a magnetic field is applied to the patterned layer of superconducting material, the conductance from the first electrode to the second electrode is greater than the conductance from the second electrode to the first electrode.

A method and composition for doped HTS tapes having directional flux pinning and critical current.

A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.

There is a superconducting article that includes a superconducting film comprising a substrate, one or more buffer layers, and a high temperature superconducting (HTS) layer. The superconducting layer may be comprised of the chemical composition REBa.sub.2Cu.sub.3O.sub.7−x, where RE is one or more rare earth elements, for example: Y, La, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu. The superconductor layer is produced using Photo-Assisted Metal Organic Chemical Vapor Deposition (PAMOCVD) and contains non-superconducting nanoparticles. The nanoparticles are substantially provided in the a-b plane and naturally oriented. The non-superconducting nanoparticles provide flux pinning centers that improve the critical current properties of the superconducting film.

A circuit manufacturing method according to the present disclosure is a circuit manufacturing method by deposition, comprising performing first deposition for forming a first superconductor layer, oxidizing a surface of the first superconductor layer to form an oxide film, performing second deposition for forming a second superconductor layer, whereby a circuit in which Josephson junctions are aligned is generated. A mask includes two opening parts and an odd number of first-type opening parts. The width of a first-type opening part has such a length that the area of a Josephson junction formed based on the first superconductor layer and the second superconductor layer derived from the first-type opening part becomes larger than the area of a Josephson junction formed based on the first superconductor layer and the second superconductor layer derived from the two opening parts that are adjacent to each other.

Techniques regarding selectively tuning the operating frequency of superconducting Josephson junction resonators are provided. For example, one or more embodiments described herein can comprise a method that can include chemically altering a Josephson junction of a Josephson junction resonator via a plasma treatment. The method can also comprise selectively tuning an operating frequency of the Josephson junction resonator based on a property of the plasma treatment.