A method for treating a stack includes a substrate of n-doped crystalline silicon and a passivation layer of hydrogenated amorphous silicon disposed on a face of the substrate, the method including exposing the stack to electromagnetic radiation during a treatment period (t) less than or equal to 12 s, the electromagnetic radiation having an irradiance (E) greater than or equal to 200 kW/m.sup.2.

A method for treating a stack includes a substrate of n-doped crystalline silicon and a passivation layer of hydrogenated amorphous silicon disposed on a face of the substrate, the method including exposing the stack to electromagnetic radiation during a treatment period (t) less than or equal to 12 s, the electromagnetic radiation having an irradiance (E) greater than or equal to 200 kW/m.sup.2.

A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.

One embodiment of the present invention provides a double-sided heterojunction solar cell module. The solar cell includes a frontside glass cover, a backside glass cover situated below the frontside glass cover, and a number of solar cells situated between the frontside glass cover and the backside glass cover. Each solar cell includes a semiconductor multilayer structure situated below the frontside glass cover, including: a frontside electrode grid, a first layer of heavily doped amorphous Si (a-Si) situated below the frontside electrode, a layer of lightly doped crystalline-Si (c-Si) situated below the first layer of heavily doped a-Si, and a layer of heavily doped c-Si situated below the lightly doped c-Si layer. The solar cell also includes a second layer of heavily doped a-Si situated below the multilayer structure; and a backside electrode situated below the second layer of heavily doped a-Si.

A solar battery module is provided with a plurality of solar battery cells which are connected to each other by connecting bus bar electrodes (21) formed on the surfaces of the adjacent solar battery cells with wiring material (41a, 41b). The bus bar electrode (21) is embedded in the wiring material (41b), and the solar battery cell (1) and the wiring material (41b) are bonded with a resin.

A solar cell includes a solar cell substrate including a principal surface on which a p-type surface and an n-type surface are exposed, a p-side electrode formed on the p-type surface and including a first linear portion linearly extending in a first direction, and an n-side electrode formed on the n-type surface and including a second linear portion linearly extending in the first direction and arranged next to the first linear portion in a second direction orthogonal to the first direction. Corners of a tip end of at least one of the first and second linear portions are formed in a chamfered shape.

There is provided a photovoltaic device (100) having a substrate (10), i-type amorphous layers (16i, 18i) formed over a region of at least a part of a back surface of the substrate, and an i-type amorphous layer (12i) formed over a region of at least a part of a light-receiving surface of the substrate (10); and characterized in that electrodes (24n, 24p) are provided on the back surface and no electrode is provided on the light-receiving surface, and an electrical resistance per unit area of the back surface side i-type amorphous layers is lower than an electrical resistance per unit area of the light-receiving surface side i-type amorphous layer.

Laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, and metal ablation. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, that are either planar or textured/three-dimensional. These techniques are highly suited to crystalline semiconductor, including crystalline silicon.

The present disclosure provides a method for forming a contact for a photovoltaic device and a photovoltaic device manufactured according to the method. The method comprises the steps of: depositing a polymeric layer onto a surface of the photovoltaic device; exposing a region of the polymeric layer to laser light; developing the polymeric layer to create at least one opening in the polymeric layer for accessing a respective portion of the surface; depositing a conductive material into the at least one opening of the polymeric layer in a manner such that the conductive material is in electrical contact with the respective portion of the surface; and removing at least a portion of the remaining developed polymeric layer from the surface.

Provided are a photoelectric conversion element capable of enhancing characteristics and reliability more than ever before and a method for manufacturing the photoelectric conversion element. The photoelectric conversion element includes a base including a semiconductor substrate, a first i-type semiconductor film placed on a portion of a surface of the semiconductor substrate, a first conductivity-type semiconductor film 3 placed on the first i-type semiconductor film, a second i-type semiconductor film placed on another portion of the surface thereof, and a second conductivity-type semiconductor film placed on the second i-type semiconductor film; an electrode section including a first electrode layer placed on the first conductivity-type semiconductor film and a second electrode layer placed on the second conductivity-type semiconductor film; and a reflective section placed in a gap region A interposed between the first electrode layer and the second electrode layer.