H10F39/812

SYSTEM AND METHOD FOR SUB-COLUMN PARALLEL DIGITIZERS FOR HYBRID STACKED IMAGE SENSOR USING VERTICAL INTERCONNECTS
20170221945 · 2017-08-03 · ·

Embodiments of a hybrid imaging sensor and methods for pixel sub-column data read from the within a pixel array.

IMAGE SENSOR

An image sensor includes a control circuit and pixels. Each pixel includes: a photosensitive area, a substantially rectangular storage area adjacent to the photosensitive area, and a read area. First and second insulated vertical electrodes electrically connected to each other are positioned opposite each other and delimit the storage area. The first electrode extends between the storage area and the photosensitive area. The second electrode includes a bent extension opposite a first end of the first electrode, with the storage area emerging onto the photosensitive area on the side of the first end. The control circuit operates to apply a first voltage to the first and second electrodes to perform a charge transfer, and a second voltage to block charge transfer.

CMOS Image Sensors Including Vertical Transistor
20170207264 · 2017-07-20 ·

Provided is a complementary metal-oxide-semiconductor (CMOS) image sensor. The CMOS image sensor can include a substrate having a first device isolation layer defining and dividing a first active region and a second active region, a photodiode disposed in the substrate and can be configured to vertically overlap the first device isolation layer, a transfer gate electrode can be disposed in the first active region and can be configured to vertically overlap the photodiode, and a floating diffusion region can be in the first active region. The transfer gate electrode can be buried in the substrate.

Imaging device with photoelectric converter

An imaging device including a unit pixel cell comprising: a semiconductor substrate including a first conductivity type region of a first conductivity type, a first and second impurity regions of a second conductivity type provided in the first conductivity type region; a photoelectric converter located above the semiconductor substrate; and a first transistor including a gate electrode and at least a part of the second impurity region as a source or a drain. The first impurity region is at least partially located in a surface of the semiconductor substrate and electrically connected to the photoelectric converter. The second impurity region is electrically connected to the photoelectric converter via the first impurity region and has an impurity concentration lower than that of the first impurity region. The second impurity region at least partially overlaps the gate electrode in a plan view.

Solid-state imaging device, method for driving the same, method for manufacturing the same, and electronic device

A solid-state imaging device includes a photoelectric conversion section configured to generate photocharges and a transfer gate that transfers the photocharges to a semiconductor region. A method for driving a unit pixel includes a step of accumulating photocharges in a photoelectric conversion section and a step of accumulating the photocharges in a semiconductor region. A method of forming a solid-state imaging device includes implanting ions into a well layer through an opening in a mask, implanting additional ions into the well layer through an opening in another mask, and implanting other ions into the well layer through an opening in yet another mask. An electronic device includes the solid-state imaging device.

SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD OF SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS
20170200754 · 2017-07-13 ·

A solid-state imaging device includes a pixel having a photoelectric conversion element which generates a charge in response to incident light, a first transfer gate which transfers the charge from the photoelectric conversion element to a charge holding section, and a second transfer gate which transfers the charge from the charge holding section to a floating diffusion. The first transfer gate includes a trench gate structure having at least two trench gate sections embedded in a depth direction of a semiconductor substrate, and the charge holding section includes a semiconductor region positioned between adjacent trench gate sections.

SEMICONDUCTOR IMAGE SENSOR MODULE AND METHOD OF MANUFACTURING THE SAME
20170195602 · 2017-07-06 ·

A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.

Multi-sensor pixel architecture for use in a digital imaging system
09698193 · 2017-07-04 · ·

A system and method for a multi-sensor pixel architecture for use in a digital imaging system is described. The system includes at least one semiconducting layer for absorbing radiation incident on opposites of the at least one semiconducting layer along with a set of electrodes on one side of the semiconducting layer for transmitting a signal associated with the radiation absorbed by the semiconducting layer.

SEMICONDUCTOR IMAGE SENSOR MODULE AND METHOD OF MANUFACTURING THE SAME
20170187977 · 2017-06-29 ·

A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.

IMAGE PICKUP DEVICE THAT IS PROVIDED WITH PERIPHERAL CIRCUITS TO PREVENT CHIP AREA FROM BEING INCREASED, AND IMAGE PICKUP APPARATUS
20170180664 · 2017-06-22 ·

An image pickup device which suppresses an increase in chip area of peripheral circuits without degrading the performance of a pixel section and makes it possible to prevent costs from being increased. The image pickup device includes a first semiconductor substrate and a second semiconductor substrate. A pixel section includes photo diodes each for generate electric charges by photoelectric conversion, floating diffusions each for temporarily storing the electric charges generated by the photo diode, and amplifiers each connected to the floating diffusion, for outputting a signal dependent on a potential of the associated floating diffusion. Column circuits are connected to vertical signal lines, respectively, for performing predetermined processing on signals output from the pixel section to vertical signal lines.