Provided is a solid state imaging device including a plurality of pixels, a signal line on which a pixel signal is transmitted, a load transistor having a drain connected to the signal line, a readout circuit that reads out the pixel signal from the signal line, and a control unit that controls a current flowing in the load transistor in accordance with a potential of a control terminal. When a reference potential of the pixel fluctuates relatively to a reference potential of the readout circuit, a potential of the control terminal relative to a potential of a source of the load transistor is changed in a same phase with a fluctuation of the reference potential of the pixel.

An image sensor includes a pixel array and a peripheral circuit. The peripheral circuit is electrically connected to the pixel array and includes a logic block and at least one redundancy block to replace the logic block when the logic block is a defective block.

A solid-state imaging device includes a pixel having a photoelectric conversion element which generates a charge in response to incident light, a first transfer gate which transfers the charge from the photoelectric conversion element to a charge holding section, and a second transfer gate which transfers the charge from the charge holding section to a floating diffusion. The first transfer gate includes a trench gate structure having at least two trench gate sections embedded in a depth direction of a semiconductor substrate, and the charge holding section includes a semiconductor region positioned between adjacent trench gate sections.

An improvement is achieved in the performance of a semiconductor device. In a method of manufacturing the semiconductor device, in an n-type semiconductor substrate, a p-type well as a p-type semiconductor region forming a part of a photodiode is formed and a gate electrode of a transfer transistor is formed. Then, after an n-type well as an n-type semiconductor region forming the other part of the photodiode is formed, a microwave is applied to the semiconductor substrate to heat the semiconductor substrate. Thereafter, a drain region of the transfer transistor is formed.

The present technology relates to a solid-state imaging device, a manufacturing method of a solid-state imaging device, and an electronic device, in which degradation of transfer characteristics of a photo diode can be suppressed. A floating diffusion is formed to reach the same depth as a layer of a photo diode formed on a silicon substrate, and a transfer transistor gate is formed therebetween. A channel that is opened/closed by control of the transfer transistor gate is formed in the silicon substrate formed with the photo diode. With this configuration, charge accumulated in the photo diode can be transferred to the floating diffusion in a vertical direction relative to the depth direction, and degradation of transfer characteristics caused by elimination of the transfer channel can be suppressed by setting the transfer channel in the depth direction. The present technology can be applied to a solid-state imaging device.

An imaging device whose dynamic range can be wide with a simple structure is provided. In a circuit configuration and an operation method of the imaging device, whether a charge detection portion provided in a pixel is saturated with electrons is determined and an operation mode is changed depending on the determination result. First imaging data is captured first, and is read out in the case where the charge detection portion is not saturated with electrons. In the case where the charge detection portion is saturated with electrons, the saturation of the charge detection portion is eliminated and second imaging data is captured and read out.

The present disclosure relates to a transistor device. In some embodiments, the transistor device has an epitaxial layer disposed over a substrate. The epitaxial layer is arranged between a source region and a drain region separated along a first direction. Isolation structures are arranged on opposite sides of the epitaxial layer along a second direction, perpendicular to the first direction. A gate dielectric layer is disposed over the epitaxial layer, and a conductive gate electrode is disposed over the gate dielectric layer. The epitaxial layer overlying the substrate improves the surface roughness of the substrate, thereby improving transistor device performance.

An image pickup device includes: a photodiode provided in a silicon substrate, and configured to generate electric charge corresponding to an amount of received light, by performing photoelectric conversion; and a transfer transistor provided at an epitaxial layer on the silicon substrate, and configured to transfer the electric charge generated in the photodiode, wherein the transfer transistor includes a gate electrode and a channel region, the gate electrode being embedded in the epitaxial layer, and the channel region surrounding the gate electrode, and the channel region has, in a thickness direction, a concentration gradient in which a curvature of a potential gradient is free from a mixture of plus and minus signs.

An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.

An imaging device includes a semiconductor substrate and pixels. Each of the pixels includes a first capacitive element including a first electrode provided above the semiconductor substrate, a second electrode provided above the semiconductor substrate, and a dielectric layer located between the first electrode and the second electrode. At least one selected from the group consisting of the first electrode and the second electrode has a first electrical contact point electrically connected to a first electrical element and a second electrical contact point electrically connected to a second electrical element different from the first electrical element. The first capacitive element includes at least one trench portion having a trench shape.