A semiconductor device includes: a substrate; a nitride semiconductor film on the substrate; a schottky electrode on the nitride semiconductor film; a first insulating film on the nitride semiconductor film, contacting at least part of a side surface of the schottky electrode, forming an interface with the nitride semiconductor film and formed of SiN; and a second insulating film covering the schottky electrode and the first insulating film and formed of AlO whose atomic layers are alternately disposed.

A heterostructure device includes a channel layer, a barrier layer disposed on the channel layer, and a first electrode and a second electrode disposed on the barrier layer, respectively. The second electrode includes a p-type semiconductor structure and a raised section disposed on the p-type semiconductor structure, the second electrode includes a Schottky contact and an ohmic contact, the Schottky contact is formed between a top surface of the p-type semiconductor structure and a first bottom surface of the raised section, the ohmic contact is formed between a second bottom surface of the raised section and the barrier layer.

A semiconductor device includes: a substrate; a semiconductor stack including a first nitride semiconductor layer and a second nitride semiconductor layer formed above the substrate; a source electrode and a drain electrode formed above a lower surface of the semiconductor stack; a gate electrode; in plan view, a current-drift area; a non-current-drift area; and a collapse reducing electrode formed on the non-current-drift area in the second nitride semiconductor layer, the collapse reducing electrode being formed to have a substantially same potential as the gate electrode. In the semiconductor device, the collapse reducing electrode and the second nitride semiconductor layer have a junction surface functioning as an energy barrier having a rectifying effect in a forward direction from the collapse reducing electrode to the second nitride semiconductor layer.

A field effect diode comprises: a substrate; a nucleation layer, a back barrier layer, a channel layer, a first barrier layer and a second barrier layer sequentially located on the substrate; and an anode and a cathode located on the second barrier layer, wherein a groove is formed in the second barrier layer, two-dimensional electron gas is formed at an interface between the first barrier layer and the channel layer except for a part of the interface under the groove when a reverse bias voltage or no external voltage is applied to the field effect diode, and is formed at all parts of the interface when a forward bias voltage is applied to the field effect diode.

A semiconductor device includes: an electron transit layer constituted of GaN; an electron supply layer constituted of In.sub.x1Al.sub.y1Ga.sub.1-x1-y1N (0x1<1, 0y1<1, 0<1x1y1<1) and provided on the electron transit layer; a source electrode and a drain electrode that are provided on the electron supply layer and located apart from each other; a threshold voltage adjustment layer constituted of In.sub.x2Al.sub.y2Ga.sub.1-x2-y2N (0x2<1, 0y2<1, 0<1x2y21) of a p-type and provided on a part of the electron supply layer located between the source electrode and the drain electrode; and a gate electrode provided on the threshold voltage adjustment layer. A high resistance layer is respectively interposed both between the gate electrode and the threshold voltage adjustment layer, and between the threshold voltage adjustment layer and the electron supply layer.

A bandgap tuneable p-GaN high electron mobility transistor (HEMT) having a structure stacked on a silicon carbide substrate. The device incorporates an indium nitride nucleation layer, followed by an aluminum nitride nucleation layer, and a first aluminum gallium nitride buffer layer. A gallium nitride channel layer is deposited on this stack, with an aluminum source and a drain contact at either end. The bandgap tuneable p-GaN HEMT includes a two-dimensional molybdenum disulfide layer over the channel, covered by a second AlGaN buffer layer. A p-type gallium nitride cap layer and a platinum gate contact complete the structure. This configuration facilitates bandgap tuning and strain engineering, enhancing electron mobility and density in the two-dimensional electron gas region, making it suitable for high-power and high-frequency applications.

Semiconductor device includes a semiconductor layer, an insulating film provided on the semiconductor layer and having an opening formed therein, a gate electrode connected to the semiconductor layer through opening, a protection film covering gate electrode, and a Ni oxide film, wherein the insulating film has a first surface on the semiconductor layer side and a second surface opposite to the first surface, and the gate electrode has a third surface facing the second surface and spaced apart from the second surface and a fourth surface connecting the second surface and the third surface. The gate electrode includes a Ni film constituting the third surface and the fourth surface, and the Ni oxide film covers the Ni film on the third surface and the fourth surface. The protection film covers the third surface and the fourth surface by being placed over Ni oxide film.

A HEMT GaN transistor with a conductive gate including an upper metal region, and a lower semi-conductor region provided to lower current gate leakage. The lower semiconductor region is formed of: a first sub-region that is P-doped and in contact with the metal region, a second sub-region that is P-doped and in contact with the second layer, and an intermediate sub-region arranged between the first sub-region and the second sub-region, the third sub-region being un-doped or unintentionally doped or doped with a low concentration of dopant compared to that of the first sub-region and second sub-region, respectively.

A number of variations may include a method that may include depositing a first layer on a first semiconductor layer in an overlying position with respect to at least one trench structure formed in the first semiconductor epi layer. The first layer may include a first metal and a second metal. A second layer may comprise a material constructed and arranged to scavenge semiconductor material migrating from the first semiconductor layer during annealing may be deposited over the first layer. The first semiconductor layer may be subjected to at least a first annealing act to provide a first structure. At least a portion of the first structure may be stripped to remove any of the first layer not reacted with the semiconductor material to form a Schottky barrier structure during the first annealing act.

A semiconductor device includes: a substrate; a nitride semiconductor film on the substrate; a schottky electrode on the nitride semiconductor film; a first insulating film on the nitride semiconductor film, contacting at least part of a side surface of the schottky electrode, forming an interface with the nitride semiconductor film and formed of SiN; and a second insulating film covering the schottky electrode and the first insulating film and formed of AlO whose atomic layers are alternately disposed.