Patent classifications
H10F39/151
Solid-state imaging device
A solid-state imaging device includes photoelectric converting sections transfer sections first buffer sections second buffer sections first output sections, and second output sections. The photoelectric converting sections generate electric charges in response to incidence of light. The transfer sections transfer the generated electric charges in a first direction or in a second direction opposite thereto in response to three-phase or four-phase drive signals. The first buffer sections and the second buffer sections acquire the electric charges transferred in the first and second directions, respectively, by the transfer sections and transfer the acquired electric charges in the first and second directions, respectively, in response to two-phase drive signals. The first output sections and the second output sections acquire the electric charges transferred from the first buffer sections and from the second buffer sections respectively, and output signals according to the acquired electric charges.
Solid-state image sensor
A solid-state image sensor includes: a pixel array that includes first pixels, each having first and second photoelectric conversion units, and second pixels, each having third and fourth photoelectric conversion units; first to fourth transfer gates via which a signal charge respectively generated in the first to fourth photoelectric conversion units is respectively transferred to first to fourth charge voltage conversion units. At least one of a gate width, a gate length and an installation position of at least one transfer gate among the first to fourth transfer gates is altered to achieve uniformity in voltage conversion efficiency at the first to fourth charge voltage conversion units.
Image sensor and method of manufacturing the same
Provided are an image sensor and a method of manufacturing the same. The method may include forming a photo-electric conversion region and a charge storage region in a semiconductor layer; forming a transistor on a front surface of the semiconductor layer; forming a recess by etching a portion of the semiconductor layer between the charge storage region and a rear surface of the semiconductor layer; and forming on a bottom surface of the recess a shield film that blocks light incident on the charge storage region.
Imaging cell array integrated circuit
A semiconductor device is provided that includes an array of imaging cells realized from a plurality of layers formed on a substrate, wherein the plurality of layers includes at least one modulation doped quantum well structure spaced from at least one quantum dot structure. Each respective imaging cell includes an imaging region spaced from a corresponding charge storage region. The at least one quantum dot structure of the imaging region generates photocurrent arising from absorption of incident electromagnetic radiation. The at least one modulation doped quantum well structure defines a buried channel for lateral transfer of the photocurrent for charge accumulation in the charge storage region and output therefrom. The at least one modulation doped quantum well structure and the at least one quantum dot structure of each imaging cell can be disposed within a resonant cavity that receives the incident electromagnetic radiation or below a structured metal film having a periodic array of holes.
Solid-state imaging device performing feed-forward control of multiplication factor of multiplication register to match dynamic range of the device with the intensity distribution of incident light
A solid-state imaging device 1 according to one embodiment of the present invention is a charge multiplying solid-state imaging device, and includes an imaging area 10 that generates a charge according to the amount of incident light, an output register unit 20 that receives the charge from the imaging area 10, and a multiplication register unit 28 that multiplies the charge from the output register 20, and performs feed-forward control of the multiplication factor of the multiplication register unit 28 according to the charge amount from the imaging area 10.
Integrated device for temporal binning of received photons
An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit also includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced.
Solid-state image sensor, method of manufacturing the same, and camera
A solid-state image sensor includes a pixel area and a peripheral circuit area. The pixel area includes a first MOS, and the peripheral circuit area includes a second MOS. A method includes forming a gate of the first MOS and a gate of the second MOS, forming a first insulating film to cover the gates of the first and second MOSs, etching the first insulating film in the peripheral circuit area in a state that the pixel area is masked to form a side spacer on a side face of the gate of the second MOS, etching the first insulating film in the pixel area in a state that the peripheral circuit area is masked, and forming the second insulating film to cover the gates of the first and second MOSs and the side spacers.
Array Substrate and Manufacturing Method Thereof, and Display Apparatus Thereof
An embodiment of the present disclosure provides an array substrate and a manufacturing method thereof and a display apparatus. The array substrate includes a base substrate, wherein, the base substrate is provided with a bonding region; a bonding pad and a first bonding lead connected with the bonding pad and extending to an edge of the base substrate are provided in the bonding region, and one or more metal patterns are arranged above the first bonding lead, the one or more metal patterns crossing over the first bonding lead and being insulated from the first bonding lead.
Imaging device and imaging system
An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes with plural transfer MOSFETs arranged respectively corresponding to the plural photodiodes, and a common MOSFET that amplifies and outputs signals read from the plural photodiodes. The unit cell includes reset and selecting MOSFETs. Within the unit cell, each pair of photodiode and corresponding transfer MOSFET has translational symmetry with respect to one another.
Solid state imaging device and electronic apparatus
Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.