Disclosed herein is a solid-state imaging apparatus including: a semiconductor base; a photodiode created on the semiconductor base and used for carrying out photoelectric conversion; a pixel section provided with pixels each having the photodiode; a first wire created by being electrically connected to the semiconductor base for the pixel section through a contact section and being extended in a first direction to the outside of the pixel section; a second wire made from a wiring layer different from the first wire and created by being extended in a second direction different from the first direction to the outside of the pixel section; and a contact section for electrically connecting the first and second wires to each other.

There is used an XY address type solid-state image pickup element (for example, a MOS type image sensor) in which two rows and two columns are made a unit, and color filters having a color coding of repetition of the unit (repetition of two verticals (two horizontals) are arranged, and when a thinning-out read mode is specified, a clock frequency of a system is changed to 1/9, and on the basis of the changed clock frequency, a pixel is selected every three pixels in both a row direction and a column direction to successively read out a pixel signal.

A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

A detection device for a CT system comprises a low-energy detector assembly; and a high-energy detector assembly disposed under the low-energy detector assembly. The high-energy detector assembly comprises: a plurality of rows of high-energy detectors arranged at predetermined intervals. With the detection device, detectors and data acquisition units are greatly reduced. A high-resolution three-dimensional CT image is acquired while high-accuracy hazardous article alarm is achieved. The cost of manufacture of the system is greatly decreased while high system performance is ensured.

In image sensors and methods of manufacturing the same, a substrate has a photoelectric conversion area, a floating diffusion area and a recess between the photoelectric conversion area and the floating diffusion area. A plurality of photodiodes is vertically arranged inside the substrate in the photoelectric conversion area. A transfer transistor is arranged along a surface profile of the substrate having the recess and configured to transfer electric charges generated from the plurality of photodiodes to the floating diffusion area. The transfer transistor includes a gate insulation pattern on a sidewall and a bottom of the recess and on a surface of the substrate around the recess, and a gate conductive pattern including polysilicon doped with impurities and positioned on the gate insulation pattern along the surface profile of the substrate having the recess, wherein a cavity is in an upper surface of the gate conductive pattern.

Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.

Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.

A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

An imaging apparatus includes a substrate, a first electrode, a second electrode, a photoelectric conversion layer, a first transistor, and a penetrating electrode. The photoelectric conversion layer is located between the first electrode and the second electrode and converts light into charges. The first transistor includes a first impurity region serving as one of a source and a drain, a second impurity region serving as the other of the source and the drain, and a first gate electrode. The penetrating electrode penetrates the substrate and electrically connects the first electrode to the first impurity region. The charges are accumulated in the first impurity region. A distance between the first impurity region and the penetrating electrode is longer in a plan view than a distance between the second impurity region and the penetrating electrode.

Examples are disclosed that relate to the use of an optical data receiver comprising a multi-tap image sensor pixel for use in optical communications. The multi-tap pixel includes a photodetector and a plurality of taps. The optical data receiver further includes a controller comprising instructions executable for controlling the multi-tap pixel to, in a first period of time, perform a first integration on the photodetector and readout charge stored on a floating diffusion capacitor of a first tap in the plurality of taps using readout circuitry of the first tap. The controller further includes instructions executable for controlling the multi-tap pixel to, in a second period of time, perform a second integration on the photodetector and readout charge stored on a floating diffusion capacitor of a second tap in the plurality of taps using readout circuitry of the second tap.