Protons are injected from a back surface side of a semiconductor substrate to repair both defects within the semiconductor substrate and also defects in a channel forming region on a front surface side of the semiconductor substrate. As a result, variation in gate threshold voltage is reduced and leak current when a reverse voltage is applied is reduced. Provided is a semiconductor device including a semiconductor substrate that includes an n-type impurity region containing protons, on a back surface side thereof; and a barrier metal that has an effect of shielding from protons, on a front surface side of the semiconductor substrate.

Herein, provided are heavily doped colloidal semiconductor nanocrystals and a process for introducing an impurity to semiconductor nanoparticles, providing control of band gap, Fermi energy and presence of charge carriers. The method is demonstrated using InAs colloidal nanocrystals, which are initially undoped, and are metal-doped (Cu, Ag, Au) by adding a metal salt solution.

This disclosure relates to bipolar transistors, such as heterojunction bipolar transistors, having at a doping spike in the collector. The doping spike can be disposed relatively near an interface between the collector and the base. For instance, the doping spike can be disposed within half of the thickness of the collector from the interface between the collector and the base. Such bipolar transistors can be implemented, for example, in power amplifiers.

To provide a semiconductor device, a method for manufacturing a semiconductor device, and an electric power converter realizing prevention of rise of on-voltage in an IGBT and improvement of a reverse recovery characteristic of a diode part by a simpler process. In the semiconductor device 100 (RC-IGBT), in the RC-IGBT having an IGBT part and a diode part in a single chip, a body layer 11 of the diode part is formed shallower than a body layer 10 of the IGBT part, a lifetime control layer 8 of the IGBT part is formed in the body layer 10 of the IGBT part, and the lifetime control layer 8 of the diode part is formed in a drift layer 4 below the body layer 11 of the diode part.

A SiC epitaxial wafer of the present invention includes a SiC single crystal substrate, and a high concentration layer that is provided on the SiC single crystal substrate and has an average value of an n-type doping concentration of 110.sup.18/cm.sup.3 or more and 110.sup.19/cm.sup.3 or less, and in-plane uniformity of the doping concentration of 30% or less.

An SiC semiconductor layer formed on an SiC semiconductor substrate includes a first layer and a second layer. The first layer is doped with an element controlling a conductivity type and an element not controlling the conductivity type. Within a plane of the first layer, a concentration of the element not controlling the conductivity type is uniform at a center portion and an outer edge portion. The second layer is doped with the element controlling the conductivity type, and is not doped with the element not controlling the conductivity type or is doped with the element not controlling the conductivity type at a lower concentration than the first layer. Within a plane of the second layer, a high and low concentration relationship of the element controlling the conductivity type at the center portion and the outer edge portion is reversed from that in the first layer.

A multilayered semiconductor diode device can include a substrate including silicon carbide (SiC) with an epitaxial drift layer including a first semiconductor oxide material above the SiC substrate with respect to a growth direction. The multilayered semiconductor diode device can further include a polar nitride layer including a polar semiconductor nitride material above the epitaxial drift layer with respect to the growth direction, and a metal layer above the polar nitride layer with respect to the growth direction.

A semiconductor structure includes an N-type silicon substrate, where the N-type silicon substrate includes alternating delta-doped layers and uniformly doped layers; and an epitaxial structure located on the N-type silicon substrate, where a material of the epitaxial structure includes a nitride material. In the present disclosure, the N-type silicon substrate may effectively suppress a diffusion of Ga/Al and the like from the epitaxial structure toward the substrate, thereby reducing a possibility of generating parasitic capacitance and leakage current, and greatly improving reliability of a device. In the present disclosure, an N-type delta-doped layers and an N-type uniformly doped layers are alternately disposed, which may further achieve depletion of multi-layer space charge, and further avoid the parasitic capacitance and the leakage current.