Magneto-optical modulator-based systems and devices for transferring quantum information are described. Such systems can be used for many applications, including as part of quantum computers. An example system includes a quantum information system configured to provide a signal corresponding to at least one qubit. The system further includes a magneto-optical driver configured to receive the signal corresponding to the at least one qubit and process the signal to generate a current based on the signal corresponding to the at least one qubit. The system further includes a magneto-optical modulator configured to receive the current from the magneto-optical driver and provide a modulated light output by modulating a received light input based on the current.

The technology disclosed in this patent document can be implemented to combine quantum computing, classical qubit control/readout, and classical digital computing in a scalable computing system based on superconducting qubits and special interconnection designs for connecting hardware components within a multi-stage cryogenic system to provide fast communications between the quantum computing module and its controller while allowing efficient management of wiring with other modules.

An oscillator in which crosstalk can be reduced is provided. An oscillator includes a ground plane made of a superconductor, a conductive member spaced apart from and surrounded by the ground plane, a SQUID of which one end is connected to the conductive member and the other end is connected to the ground plane, a first connection circuit made of a superconductor, connecting parts of the ground plane located on both sides of a vicinity of a connection part between the conductive member and the SQUID to each other, and a superconducting loop circuit surrounding the SQUID and using the ground plane and the first connection circuit.

A process for fabricating an electronic component incorporating double quantum dots and split gates includes providing a substrate surmounted with a stack of a semiconductor layer and of a dielectric layer that is formed above the semiconductor layer. The process also includes forming a mask on the dielectric layer and etching the dielectric layer and the semiconductor layer with the pattern of the mask, so as to form a stack of a semiconductor nanowire and of a dielectric hard mask. Finally, the process includes depositing a gate material on all of the wafer and carrying out a planarization, until the dielectric hard mask is reached, so as to form first and second gates that are electrically insulated from each other on either side of said nanowire.

A transistor includes (i) a first wire including a semiconducting component configured to operate in an on state at temperatures above a semiconducting threshold temperature and (ii) a second wire including a superconducting component configured to operate in a superconducting state while: a temperature of the superconducting component is below a superconducting threshold temperature and a first input current supplied to the superconducting component is below a current threshold. The semiconducting component is located adjacent to the superconducting component. In response to a first input voltage, the semiconducting component is configured to generate an electromagnetic field sufficient to lower the current threshold such that the first input current exceeds the lowered current threshold.

A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.

A circuit manufacturing method according to the present disclosure is a circuit manufacturing method by deposition, comprising performing first deposition for forming a first superconductor layer, oxidizing a surface of the first superconductor layer to form an oxide film, performing second deposition for forming a second superconductor layer, whereby a circuit in which Josephson junctions are aligned is generated. A mask includes two opening parts and an odd number of first-type opening parts. The width of a first-type opening part has such a length that the area of a Josephson junction formed based on the first superconductor layer and the second superconductor layer derived from the first-type opening part becomes larger than the area of a Josephson junction formed based on the first superconductor layer and the second superconductor layer derived from the two opening parts that are adjacent to each other.

A superconducting quantum hybrid system includes: a silicon carbide (SiC) epitaxial layer; and a superconducting qubit line, the superconducting qubit line corresponding to a superconducting qubit, where a designated region of the SiC epitaxial layer includes a nitrogen vacancy (NV) center, the NV center being formed by implanting nitrogen ions into the designated region of the SiC epitaxial layer, and where the superconducting qubit line is located on a surface of the SiC epitaxial layer, the superconducting qubit is coupled to a solid-state defect qubit, and the solid-state defect qubit is a qubit corresponding to the NV center in the designated region.

Techniques regarding selectively tuning the operating frequency of superconducting Josephson junction resonators are provided. For example, one or more embodiments described herein can comprise a method that can include chemically altering a Josephson junction of a Josephson junction resonator via a plasma treatment. The method can also comprise selectively tuning an operating frequency of the Josephson junction resonator based on a property of the plasma treatment.

Devices and/or computer-implemented methods facilitating static ZZ suppression and Purcell loss reduction using mode-selective coupling in two-junction superconducting qubits are provided. In an embodiment, a device can comprise a superconducting bus resonator. The device can further comprise a first superconducting qubit. The device can further comprise a second superconducting qubit, the first superconducting qubit and the second superconducting qubit respectively comprising: a first superconducting pad; a second superconducting pad; a third superconducting pad; a first Josephson Junction coupled to the first superconducting pad and the second superconducting pad; and a second Josephson Junction coupled to the second superconducting pad and the third superconducting pad. The first superconducting pad and the second superconducting pad of the first superconducting qubit and the second superconducting qubit are coupled to the superconducting bus resonator. The superconducting bus resonator entangles the first superconducting qubit and the second superconducting qubit based on receiving a control signal.