A multijunction solar cell which includes: an upper first solar subcell having a first band gap; a second solar subcell adjacent to said upper first solar subcell and having a second band gap smaller than said first band gap; a third solar subcell adjacent to said second solar subcell and having a third band gap smaller than said second band gap; a graded interlayer adjacent to said third solar subcell, said graded interlayer having a fourth band gap greater than said third band gap; and a lower fourth solar subcell adjacent to said graded interlayer, said lower fourth solar subcell having a fifth band gap smaller than said third band gap such that said lower fourth solar subcell is lattice mismatched with respect to said third solar subcell.

A scalable voltage source having a number N of partial voltage sources implemented as semiconductor diodes connected to one another in series, wherein each of the partial voltage sources has a semiconductor diode with a p-n junction. A tunnel diode is formed between sequential pairs of partial voltage sources, wherein the tunnel diode has multiple semiconductor layers with a larger band gap than the band gap of the p/n absorption layers and the semiconductor layers with the larger band gap are each made of a material with modified stoichiometry and/or a different elemental composition than the p/n absorption layers of the semiconductor diode. The partial voltage sources and the tunnel diodes are monolithically integrated together, and jointly form a first stack with a top and a bottom, and the number N of partial voltage sources is greater than or equal to two.

A tunnel junction for a semiconductor device is disclosed. The tunnel junction includes a n-doped tunnel layer and a p-doped tunnel layer. The p-doped tunnel layer is constructed of aluminum gallium arsenide antimonide (AlGaAsSb). A semiconductor device including the tunnel junction with the p-doped tunnel layer constructed of AlGaAsSb is also disclosed.

There is disclosed a method of preparing a photovoltaic device. In particular, the method comprises making thin-film GaAs solar cells integrated with low-cost, thermoformed, lightweight and wide acceptance angle mini-CPCs. The fabrication combines ND-ELO thin film cells that are cold-welded to a foil substrate, and subsequently attached to the CPCs in an adhesive-free transfer printing process. There is also disclosed an improved photovoltaic device made by the disclosed method. The improved photovoltaic device comprises a thin-film solar integrated with non-tracking mini-compound parabolic concentrators, wherein the plastic compound parabolic concentrator comprise two parabolas tilted at an angle equal to the acceptance angle of the compound parabolic concentrator.

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material.

A compound-semiconductor photovoltaic cell includes a first photoelectric conversion cell made of a first compound-semiconductor material which lattice matches with GaAs or Ge; a first tunnel junction layer arranged on a deep side farther than the first photoelectric conversion cell in a light incident direction, and including a first p-type (Al.sub.x1Ga.sub.1-x1).sub.y1In.sub.1-y1As (0x1<1, 0<y11) layer and a first n-type (Al.sub.x2Ga.sub.1-x2).sub.y2In.sub.1-y2P (0x2<1, 0<y2<1) layer; and a second photoelectric conversion cell arranged on a deep side farther than the first tunnel junction layer in the light incident direction, and made of a second compound-semiconductor material which is a GaAs-based semiconductor material. The first photoelectric conversion cell and the second photoelectric conversion cell are joined via the first tunnel junction layer, and a lattice constant of the first n-type (Al.sub.x2Ga.sub.1-x2).sub.y2In.sub.1-y2P layer is greater than a lattice constant of the first photoelectric conversion cell.

Tandem solar cells comprising two or more solar cells connected in a solar cell stack via pn diode tunnel junctions and methods for fabricating the tandem solar cells using epitaxial lift off and transfer printing are provided. The tandem solar cells have improved tunnel junction structures comprising a current tunneling layer integrated between the p and n layers of the pn diode tunnel junction that connects the solar cells.

Systems and Methods for Advanced Ultra-High-Performance InP Solar Cells are provided. In one embodiment, an InP photovoltaic device comprises: a p-n junction absorber layer comprising at least one InP layer; a front surface confinement layer; and a back surface confinement layer; wherein either the front surface confinement layer or the back surface confinement layer forms part of a High-Low (HL) doping architecture; and wherein either the front surface confinement layer or the back surface confinement layer forms part of a heterointerface system architecture.

A method for producing a plurality of semiconductor components (1) is provided, comprising the following steps: a) providing a semiconductor layer sequence (2) having a first semiconductor layer (21), a second semiconductor layer (22) and an active region (25), said active region being arranged between the first semiconductor layer and the second semiconductor layer for generating and/or receiving radiation; b) forming a first connection layer (31) on the side of the second connection layer facing away from the first semiconductor layer; c) forming a plurality of cut-outs (29) through the semiconductor layer sequence; d) forming a conducting layer (4) in the cut-outs for establishing an electrically conductive connection between the first semiconductor layer and the first connection layer; and e) separating into the plurality of semiconductor components, wherein a semiconductor body (20) having at least one of the plurality of cut-outs arises from the semiconductor layer sequence for each semiconductor component and the at least one cut-out is completely surrounded by the semiconductor body in a top view of the semiconductor body. Furthermore, a semiconductor component is provided.