A MEMS device may include a first electrode region; a first piezoelectric layer arranged over the first electrode region; a second electrode region arranged over the first piezoelectric layer; a second piezoelectric layer arranged over the first piezoelectric layer and the second electrode region; a third electrode region arranged over the second piezoelectric layer; a first input port coupled to the first electrode region and/or the second electrode region for providing a first electrical signal to the first piezoelectric layer to generate a first vibration in the first piezoelectric layer; a second input port coupled to the second electrode region and/or the third electrode region for providing a second electrical signal to the second piezoelectric layer to generate a second vibration in the second piezoelectric layer; and an output port configured to receive an output signal including a superposition of the first vibration and the second vibration.

A resonant member of a MEMS resonator oscillates in a mechanical resonance mode that produces non-uniform regional stresses such that a first level of mechanical stress in a first region of the resonant member is higher than a second level of mechanical stress in a second region of the resonant member. A plurality of openings within a surface of the resonant member are disposed more densely within the first region than the second region and at least partly filled with a compensating material that reduces temperature dependence of the resonant frequency corresponding to the mechanical resonance mode.

Semiconductor strain gages fabricated on Silicon-on-insulator (SOI) material, and the method of making them. Force sensing elements are uniformly batch-fabricated at wafer level and singulated individually by a wire bonding method. In another method, they are singulated by plucking them off the wafer from their attachment site.

A method for manufacturing a PMUT device including a piezoelectric element located at a membrane element is provided. The method includes receiving a silicon on insulator substrate having a first silicon layer, an oxide layer, and a second silicon layer. Portions of a first surface of the second silicon layer are exposed by removing exposed side portions of the first silicon layer and corresponding portions of the oxide layer, and a central portion including the remaining portions of the first silicon layer and of the oxide layer is defined. Anchor portions for the membrane element are formed at the exposed portions of the first surface of the second silicon layer. The piezoelectric element is formed above the central portion, and the membrane element is defined by selectively removing the second layer and removing the remaining portion of the oxide from under the remaining portion of the first silicon layer.

A design process is used for designing a device comprising a plurality of micro-machined elements, each comprising a flexible membrane, the elements being arranged in a plane in a determined topology. The design process comprises a step of defining the determined topology so that it has a character compatible with a generic substrate having cavities, the characteristics of which are pre-established. Each flexible membrane of the micro-machined elements is associated with one cavity of the generic substrate. The present disclosure also relates to a fabrication process for fabricating a device comprising a plurality of micro-machined elements, and to this device itself, wherein only some of the pairs of cavities and flexible membranes are configured to form a set of functional micro-machined elements.

A wafer-level chip-scale package includes a polymeric body having a conductive via passing through the polymeric body and a piezoelectric substrate directly bonded to an upper end of the conductive via. The wafer-level chip-scale package further includes a cavity defined between a portion of the polymeric body and the piezoelectric substrate and a metal seal ring disposed in the body and having an upper end bonded to the piezoelectric substrate, the metal seal ring passing only partially through the body.

A method of manufacture for an acoustic resonator device. The method can include forming a topside metal electrode overlying a piezoelectric substrate with a piezoelectric layer and a seed substrate. A topside micro-trench can be formed within the piezoelectric layer and a topside metal can be formed overlying the topside micro-trench. This topside metal can include a topside metal plug formed within the topside micro-trench. A first backside trench can be formed underlying the topside metal electrode, and a second backside trench can be formed underlying the topside micro-trench. A backside metal electrode can be formed within the first backside trench, while a backside metal plug can be formed within the second backside trench and electrically coupled to the topside metal plug and the backside metal electrode. The topside micro-trench, the topside metal plug, the second backside trench, and the backside metal plug form a micro-via.

A wireless communication system includes a first coupler having a first pair of electrodes and second coupler having a second pair of electrodes that at least partially oppose the first pair of electrodes. A transmission circuit applies a differential signal to the first coupler. A reception circuit receives a differential signal output from the second coupler based on electromagnetic coupling between the first coupler and the second coupler. A distance between centroids of the first pair of electrodes differs from a distance between centroids of the second pair of electrodes.

An acoustic resonator includes a resonant portion including a piezoelectric layer disposed between a first electrode and a second electrode, and a frame portion disposed along an outer edge of the second electrode. The frame portion includes three reflective portions reflecting lateral waves generated in the resonant portion.

Semiconductor strain gages fabricated on Silicon-on-insulator (SOI) material, and the method of making them. Force sensing elements are uniformly batch-fabricated at wafer level and singulated individually by a wire bonding method. In another method, they are singulated by plucking them off the wafer from their attachment site.