Patent classifications
H01L21/36
Halogenated dopant precursors for epitaxy
A method for forming a film on a substrate is provided. The method includes positioning a substrate within a processing volume of a process chamber and heating the substrate. The method further includes forming a semiconductor film on the substrate by exposing the substrate to two or more reactants including a silicon source and a halogenated dopant source. The semiconductor film includes one or more epitaxial regions and one or more non-epitaxial regions.
Semiconductor fin fabrication method and Fin FET device fabrication method
A semiconductor fin fabrication method includes: providing a substrate; selectively epitaxially growing a first mask layer in a predetermined zone on the substrate; selectively epitaxially growing a first epitaxial layer on the substrate by using the first mask layer as a mask; and removing the first mask layer and a part, under the first mask layer, of the substrate by using the first epitaxial layer as a mask and by using an anisotropic etching method, so as to form a fin under the first epitaxial layer. According to the foregoing solutions, a manner in which a selective epitaxial growth technology and an anisotropic etching technology are combined is used It can be ensured that a semiconductor fin and a surface of a gate oxidized layer are perpendicular to each other, roughness of a surface of the semiconductor fin is reduced, and a fin with a smooth side surface is formed.
Multi-oscillator, continuous Cody-Lorentz model of optical dispersion
Methods and systems for monitoring band structure characteristics and predicting electrical characteristics of a sample early in a semiconductor manufacturing process flow are presented herein. High throughput spectrometers generate spectral response data from semiconductor wafers. In one example, the measured optical dispersion is characterized by a Gaussian oscillator, continuous Cody-Lorentz model. The measurement results are used to monitor band structure characteristics, including band gap and defects such as charge trapping centers, exciton states, and phonon modes in high-K dielectric layers and embedded nanostructures. The Gaussian oscillator, continuous Cody-Lorentz model can be generalized to include any number of defect levels. In addition, the shapes of absorption defect peaks may be represented by Lorentz functions, Gaussian functions, or both. These models quickly and accurately represent experimental results in a physically meaningful manner. The model parameter values can be subsequently used to gain insight and control over a manufacturing process.
Manufacturing method of semiconductor device
A method for manufacturing a highly reliable semiconductor device with less change in threshold voltage is provided. An insulating film from which oxygen can be released by heating is formed in contact with an oxide semiconductor layer, and light irradiation treatment is performed on a gate electrode or a metal layer formed in a region which overlaps with the gate electrode, so that oxygen is added into the oxide semiconductor layer in a region which overlaps with the gate electrode. Accordingly, oxygen vacancies or interface states in the oxide semiconductor layer in a region which overlaps with the gate electrode can be reduced.
Pretreatment method for reduction and/or elimination of basal plane dislocations close to epilayer/substrate interface in growth of SiC epitaxial films
Non-destructive pretreatment methods are generally provided for a surface of a SiC substrate with substantially no degradation of surface morphology thereon. In one particular embodiment, a molten mixture (e.g., including KOH and a buffering agent) is applied directly onto the surface of the SiC substrate to form a treated surface thereon. An epitaxial film (e.g., SiC) can then be grown on the treated surface to achieve very high (e.g., up to and including 100%) BPD to TED conversion rate close to the epilayer/substrate interface.
Semiconductor device and method of forming the same
A semiconductor device includes a substrate, at least one semiconductor fin, and at least one epitaxy structure. The semiconductor fin is present on the substrate. The semiconductor fin has at least one recess thereon. The epitaxy structure is present in the recess of the semiconductor fin. A topmost location of the epitaxy structure has an n-type impurity concentration lower than an n-type impurity concentration of a location of the epitaxy structure below the topmost location.
Doped gallium nitride high-electron mobility transistor
Embodiments include high electron mobility transistors (HEMTs) comprising a substrate and a barrier layer including a doped component. The doped component may be a germanium doped layer or a germanium doped pulse. Other embodiments may include methods for fabricating such a HEMT.
Thin-film transistor (TFT), manufacturing method thereof, array substrate and display device
A thin-film transistor (TFT), a manufacturing method thereof, an array substrate and a display device are disclosed. The method for manufacturing the a TFT comprises the step of forming a gate electrode, a gate insulating layer, an active area, a source electrode and a drain electrode on a base substrate. The active area (4) is made of a ZnON material. When the gate insulating layer is formed, a material for forming the gate insulating layer is subjected to control treatment, so that a sub-threshold amplitude of the TFT is less than or equal to 0.5 mV/dec. The manufacturing method reduces the sub-threshold amplitude of the TFT and improves the semiconductor characteristic of the TFT.
Semiconductor device, display device including the semiconductor device, display module including the display device, and electronic appliance including the semiconductor device, the display device, and the display module
In a semiconductor device including a transistor, the transistor is provided over a first insulating film, and the transistor includes an oxide semiconductor film over the first insulating film, a gate insulating film over the oxide semiconductor film, a gate electrode over the gate insulating film, a second insulating film over the oxide semiconductor film and the gate electrode, and a source and a drain electrodes electrically connected to the oxide semiconductor film. The first insulating film includes oxygen. The second insulating film includes hydrogen. The oxide semiconductor film includes a first region in contact with the gate insulating film and a second region in contact with the second insulating film. The first insulating film includes a third region overlapping with the first region and a fourth region overlapping with the second region. The impurity element concentration of the fourth region is higher than that of the third region.
Method for forming low temperature polysilicon thin film
Embodiments of the present invention provide a method for forming a low temperature polysilicon thin film. The method for forming the low temperature polysilicon thin film can include: depositing a buffer layer and an amorphous silicon layer on a substrate in this order; heating the amorphous silicon layer; performing an excimer laser annealing process on the amorphous silicon layer to form a polysilicon layer; oxidizing partially the polysilicon layer so as to form an oxidation portion at an upper portion of the polysilicon layer; and removing the oxidation portion of the polysilicon layer to form a polysilicon thin film.