An imaging device includes a first substrate including a pixel array and a first multilayer wiring layer. The first multilayer wiring layer includes a first wiring that receives electrical signals based on electric charge generated by at least one photoelectric conversion unit, and a plurality of second wirings. The imaging device includes a second substrate including a second multilayer wiring layer and a logic circuit that processes the electrical signals. The second multilayer wiring layer includes a third wiring bonded to the first wiring, and a plurality of fourth wirings. At least one of the plurality of fourth wirings being bonded to at least one of the plurality of second wirings. The second multilayer wiring layer includes at least one fifth wiring that is connected to the plurality of fourth wirings and that receives a power supply signal.

A substrate-removed, surface passivated, and anti-reflective (AR) coated detector assembly is provided. The assembly has an AR coating or passivation layer which includes a wide bandgap thin-film dielectric/passivation layer integrated therein. The wide bandgap thin-film dielectric/passivation layer is positioned proximal to a back interface of a substrate-removed detector assembly. A method of manufacturing the detector assembly includes etching a backside of a partially-removed-substrate detector assembly to obtain an etched detector assembly removed from a substrate. A wide bandgap layer is deposited, in a vacuum chamber, on the etched detector assembly without utilizing an adhesive layer. Additional anti-reflective coating layers are deposited, in the same vacuum chamber, on the wide bandgap layer to form an anti-reflective coating layer with the wide bandgap layer integrated therein. The wide bandgap layer is positioned proximal to an interface portion between the anti-reflective coating layer and the detector assembly.

An imaging device includes a first substrate including a pixel array and a first multilayer wiring layer. The first multilayer wiring layer includes a first wiring that receives electrical signals based on electric charge generated by at least one photoelectric conversion unit, and a plurality of second wirings. The imaging device includes a second substrate including a second multilayer wiring layer and a logic circuit that processes the electrical signals. The second multilayer wiring layer includes a third wiring bonded to the first wiring, and a plurality of fourth wirings. At least one of the plurality of fourth wirings being bonded to at least one of the plurality of second wirings. The second multilayer wiring layer includes at least one fifth wiring that is connected to the plurality of fourth wirings and that receives a power supply signal.

A disclosed method of manufacturing a semiconductor device includes singulating a bonded substrate including a first substrate provided with an interconnection structure layer and a first bonding layer and a second substrate provided with a second bonding layer opposed to the first bonding layer into a plurality of semiconductor devices. The bonded substrate includes functional element regions and a scribe region in a plan view. The singulating includes forming a groove in the scribe region, and cutting the bonded substrate in a region outside an inner side surface of the groove. The groove is formed penetrating one of the first substrate and the second substrate, the interconnection structure layer, and the first and second bonding layers. The groove extends from the one of the first substrate and the second substrate to a position deeper than all interconnection layers provided between the first and second substrates.

A disclosed method of manufacturing a semiconductor device includes singulating a bonded substrate including a first substrate provided with an interconnection structure layer and a first bonding layer and a second substrate provided with a second bonding layer opposed to the first bonding layer into a plurality of semiconductor devices. The bonded substrate includes functional element regions and a scribe region in a plan view. The singulating includes forming a groove in the scribe region, and cutting the bonded substrate in a region outside an inner side surface of the groove. The groove is formed penetrating one of the first substrate and the second substrate, the interconnection structure layer, and the first and second bonding layers. The groove extends from the one of the first substrate and the second substrate to a position deeper than all interconnection layers provided between the first and second substrates.

An optoelectronic device includes at least one pixel, each pixel comprising an optical resonator comprising a photodetecting structure confined between a reflective metal layer and a second reflective metal layer; and a readout integrated circuit arranged on a substrate and comprising at least one buried readout electrode dedicated to the pixel and at least one metal or dielectric outer layer. The assembly comprising at least the reflective metal layer and the outer layer of the readout integrated circuit is called a planar assembly structure. The first metal layer is connected to the readout electrode by way of a metal via passing through the optical resonator structure and the planar assembly structure. The metal via is electrically isolated from the photodetecting structure and from the planar assembly structure.

A thermistor comprising two electrodes (2, 3) and a layered structure (4) in contact with the two electrodes (2, 3), wherein the layered structure (4) comprises at least one first layer (4a) comprising first colloidal quantum dots, and at least one second layer (4b) comprising second colloidal quantum dots which differ from the first colloidal quantum dots. Also, a bolometer comprising a thermistor. Also, an image sensor comprising a plurality of pixels, wherein each pixel comprises a respective bolometer.

An infrared sensor includes a first semiconductor substrate, a second semiconductor substrate, a sealing frame, and a first connection. The first semiconductor substrate includes a first main surface and an infrared detection element. The second semiconductor substrate includes a second main surface and a signal processing circuit. The sealing frame surrounds an internal space with the first main surface, the infrared detection element, and the second main surface. The first connection electrically connects the infrared detection element and the signal processing circuit. The internal space is hermetically sealed by the first main surface, the infrared detection element, the second main surface, and the sealing frame. Each of the sealing frame and the first connection is sandwiched between the first main surface and the second main surface.