Patent classifications
H10D30/204
Network device having transistors employing charge-carrier mobility modulation to drive operation beyond transition frequency
A network device includes one or more circuit components. The one or more circuit components include a semiconductor substrate, a first device terminal and a second device terminal, a drift region, and a mobility modulator. Both device terminals are coupled to the semiconductor substrate, the second device terminal being spatially separated from the first device terminal. The drift region is disposed on the semiconductor substrate between the first device terminal and the second device terminal, the drift region being configured to allow a flow of charge-carriers between the first device terminal and the second device terminal. The mobility modulator is coupled to the drift region, the mobility modulator being configured to selectively apply a field across the drift region responsive to one or more modulation signals, so as to modulate a mobility of charge-carriers as a function of longitudinal position along the drift region.
Semiconductor devices including gate spacer
A semiconductor device includes a first active region defined on a substrate, a first gate electrode across the first active region, a first drain region in the first active region at a position adjacent to the first gate electrode, an undercut region between the first active region and the first gate electrode, and a first gate spacer on a side surface of the first gate electrode and extending into the undercut region.
SEMICONDUCTOR DEVICES INCLUDING GATE SPACER
A semiconductor device includes a first active region defined on a substrate, a first gate electrode across the first active region, a first drain region in the first active region at a position adjacent to the first gate electrode, an undercut region between the first active region and the first gate electrode, and a first gate spacer on a side surface of the first gate electrode and extending into the undercut region.
HIGH VOLTAGE FINFET DEVICE AND METHOD
A semiconductor structure is disclosed that includes: a source region and a drain region in a substrate; a first gate structure disposed above a first channel region in the substrate and between the source region and the drain region wherein the first gate structure includes a first gate dielectric disposed above the first channel region and a first gate electrode disposed above the first gate dielectric; and a second gate structure disposed above a second channel region in the substrate and between the first gate structure and the drain region, wherein the first gate structure is disposed closer to the source region and the second gate structure is disposed closer to the drain region.