The laminated structure has a base insulating layer, a metal oxide layer arranged on the base insulating layer, and an oxide semiconductor layer arranged in contact with the metal oxide layer, and the oxide semiconductor layer has a first region in which the same metal element as the metal element contained in the metal oxide layer has the concentration gradient, and the concentration gradient of the metal element increases as it approaches the interface between the metal oxide layer and the oxide semiconductor layer.

A semiconductor component, in particular a transistor. The semiconductor component includes: a first-type-doped source layer, an second-type-doped channel layer, a first-type-doped drift region, a substrate layer, the channel layer being located between the source layer and the substrate layer and is adjacent to the source layer, wherein the drift region is located between the channel layer and the substrate layer, wherein the semiconductor component includes a gate trench, which extends vertically from the source layer toward the drift region and is adjacent to the channel layer and at least a portion of the source layer; and a second-type-doped shielding region, which extends vertically from the source layer toward the drift region, is adjacent to the channel layer and the source layer and is laterally separated from the gate trench, and wherein the drift region includes a plurality of first-type-doped drift layers, which each have a different doping concentration.

Provided are a thin film transistor and a method for manufacturing the same, and more particularly, to a thin film transistor having improved characteristics and a method for manufacturing the same. A thin film transistor in accordance with an exemplary embodiment includes a gate electrode, an active layer containing oxide of a first metal element and disposed to be vertically spaced apart from the gate electrode, source and drain electrodes disposed to be spaced apart from each other on the active layer, and a contact layer disposed between the active layer and the source and drain electrodes.

In certain examples, methods and semiconductor structures are directed to devices and methods involving a semiconductor device with a current-blocking layer (CBL) and a first material layer having n-type dopant material that is activated with recovered crystallinity. The CBL may have a surface portion along a plane of the CBL (e.g., in a transistor, the CBL may be between the first material layer and another material layer). A p-type dopant material is located or diffused into the CBL and activated without recovered crystallinity, and the CBL's dopant profile is characterized as corresponding to an outer portion of the CBL with a higher concentration of the p-type dopant material than a concentration of the p-type dopant material in an inner portion of the CBL.

Semiconductor devices with improved withstand voltage performance are disclosed. In one example, a semiconductor device includes a source region of a first conductivity type which includes a first semiconductor material; a channel region of a second conductivity type which is adjacent to the source region and includes the first semiconductor material; a first drain region of the second conductivity type which is adjacent to the channel region and including a second semiconductor material having a band gap wider than a band gap of the first semiconductor material; and a second drain region of the first conductivity type that is adjacent to the first drain region and includes the second semiconductor material.

A semiconductor film comprising a solid phase crystallized product of tin and hydrogen-doped indium oxide.

An oxide semiconductor transistor, a method for manufacturing the same, and a semiconductor device including the oxide semiconductor transistor are disclosed. The disclosed oxide semiconductor transistor may include a gate electrode, a p-type oxide semiconductor channel layer disposed opposite the gate electrode, a gate insulating layer between the gate electrode and the oxide semiconductor channel layer, a source electrode and a drain electrode electrically connected to a first region and a second region of the oxide semiconductor channel layer, respectively, and an intermediate layer disposed between the oxide semiconductor channel layer and the source electrode, as well as between the oxide semiconductor channel layer and the drain electrode, the intermediate layer having an oxygen areal density (OAD) higher than an OAD of the oxide semiconductor channel layer.

The present invention provides a surge protection element that can smoothly handle an unnecessary current produced by a harmful pulse. A surge protection element 10 is the surge protection element 10 including a first electrode 11, an n-type semiconductor layer 12, a second electrode 13 sequentially joined in a designated direction. A portion at least from any position in the n-type semiconductor layer 12 toward the second electrode 13 in the designated direction is composed of a graded composition layer 12B, whereby in a state in which a voltage is not applied, a bandgap Eg of the portion gradually increases in the designated direction, and part of a conduction level Ec exceeding a Fermi level Ef in the portion gradually increases in the designated direction.

A power transistor. The power transistor has a monocrystalline SiC layer. An AlGaN layer is arranged on the monocrystalline SiC layer. A gallium oxide layer is arranged on the AlGaN layer.

A transistor, an integrated semiconductor device, and methods of making the same are provided. The transistor includes a dielectric layer having a plurality of dielectric protrusions, a channel layer conformally covering the protrusions of the dielectric layer to form a plurality of trenches between two adjacent dielectric protrusion, a gate layer disposed on the channel layer. The gate layer 106 has a plurality of gate protrusions fitted into the trenches. The transistor also includes active regions aside the gate layer. The active regions are electrically connected to the channel layer.