Patent classifications
H10D64/2527
Vertical power semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate comprising a first surface and a second surface positioned on an opposite side of the substrate. A first gate structure is located above the first surface of the substrate and a second gate structure is located above the first surface of the substrate, adjacent to the first gate structure. A first dielectric layer covers the first gate structure, the second gate structure, and the first surface of the substrate. The first dielectric layer has a first opening between the first gate structure and the second gate structure. A current spreading layer is located at a bottom of the first opening. The current spreading layer has a first width approximately equal to a width of the bottom of the first opening. A conductive plug is located between the first gate structure and the second gate structure and in contact with the current spreading layer.
SEMICONDUCTOR DEVICE
A semiconductor device of embodiments includes: a first electrode; a second electrode; a semiconductor layer having a first face and a second face; a gate electrode including a second portion and a first portion extending in a first direction in the semiconductor layer; a field plate electrode between the gate electrode and the second face in the semiconductor layer and electrically connected to the first electrode; a conductive layer in the semiconductor layer, provided between the first portion and the second portion, and electrically separated from the first electrode; and a field plate insulating layer between the field plate electrode and the semiconductor layer. A first distance in the first direction between an end of the field plate insulating layer in the first direction on the first face and the conductive layer is smaller than a second distance between the end and the gate electrode in the first direction.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor device includes a substrate, a first electrode and a second electrode. The semiconductor device includes a MOSFET that has the first electrode as a drain electrode and the second electrode as a source electrode. The first electrode has a layer region provided on a first main surface and a first region extending from the first main surface into the substrate in a first direction from the first electrode to the second electrode. A lower surface of the first electrode protrudes in a direction opposite to the first direction.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a first electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a gate electrode and a second electrode. The gate electrode has a first region opposite to the second semiconductor region and a second region opposite to the third semiconductor region. The gate electrode has a first length from a lower surface to an upper surface of the second region and a second length from the lower surface to an upper surface of the first region, and the first length is greater than the second length.
ELECTRONIC DEVICES COMPRISING EPITAXIAL POLYSILICON SOURCE CONTACTS AND RELATED SYSTEMS AND METHODS
An electronic device that comprises a source stack comprising one or more conductive materials, a source contact adjacent to the source stack, tiers of alternating conductive materials and dielectric materials adjacent to the source contact, and pillars extending through the tiers and the source contact and into the source stack. At least a portion of the source contact comprises an epitaxial polysilicon material. Electronic systems and methods of forming the electronic device are also disclosed.
SILICON CARBIDE SEMICONDUCTOR CONTACT STRUCTURES
A silicon carbide device including a trench contact structure configured to connect to a part of a transistor. The trench contact structure includes a trench having sidewalls, a silicide layer located in the trench and covering the sidewalls, and a metal contact element located in the trench and connected to the part of the transistor via the silicide layer.
Method for forming a field-effect transistor having a fractionally enhanced body structure
An integrated circuit includes an epitaxial layer over a semiconductor substrate. The epitaxial layer has a first conductivity type and a top surface. First, second and third trenches are located in the epitaxial layer. The trenches respectively include first, second and third field plates. First and second body members are located within the epitaxial layer and have a different second conductivity type. The first body member is located between the first and second trenches, and the second body member is located between the second and third trenches. The first body member extends a first distance between the top surface and the substrate, and the second body member extends a lesser second distance between the top surface and the substrate.
Semiconductor device and method of manufacturing the same
A semiconductor device and a method of manufacturing the same capable of ensuring a sufficient breakdown voltage near a terminal end portion of a cell portion are provided. The cell portion includes a first cell column region and a second cell column region adjacent to each other, and a first cell trench gate and a second cell trench gate arranged between the first cell column region and the second cell column region. An outer peripheral portion includes an outer peripheral trench gate connected to an end portion of each of the first cell trench gate and the second cell trench gate, and a first outer peripheral column region arranged on the cell portion side with respect to the outer peripheral trench gate and extended across the first cell trench gate and the second cell trench gate in plan view.
SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a semiconductor layer having a first face with a trench formed thereon and a second face opposite to the first face, a gate electrode, and a gate insulating layer. The semiconductor layer includes a first n-type semiconductor layer, a second n-type semiconductor layer, a p-type semiconductor layer, and an n-type semiconductor region. The trench is formed to penetrate through the p-type semiconductor layer and to reach the second n-type semiconductor layer. The p-type semiconductor layer includes an extended portion extending to a position closer to the second face of the semiconductor layer than the trench is. Such structure allows suppressing dielectric breakdown in the gate insulating layer.
Vertical Power Semiconductor Device and Manufacturing Method Thereof
A semiconductor device includes a substrate comprising a first surface and a second surface positioned on an opposite side of the substrate. A first gate structure is located above the first surface of the substrate and a second gate structure is located above the first surface of the substrate, adjacent to the first gate structure. A first dielectric layer covers the first gate structure, the second gate structure, and the first surface of the substrate. The first dielectric layer has a first opening between the first gate structure and the second gate structure. A current spreading layer is located at a bottom of the first opening. The current spreading layer has a first width approximately equal to a width of the bottom of the first opening. A conductive plug is located between the first gate structure and the second gate structure and in contact with the current spreading layer.