A semiconductor device may include a semiconductor layer including a two-dimensional semiconductor material and an electrode layer on the semiconductor layer. The electrode layer may include a first impurity pile-up region in which impurities are gathered.

Provided is a semiconductor device including a plurality of active patterns spaced apart in a first direction intersecting with a surface of a substrate, a gate electrode extending in a second direction intersecting with the first direction and surrounding the plurality of active patterns, and a source/drain pattern spaced apart from the gate electrode in a third direction intersecting with the first direction and the second direction and connected to the plurality of active patterns in the third direction, and each of the plurality of active patterns includes a contact part, at least a portion of which is inserted within the source/drain pattern, and a connection part extending from the contact part away from the source/drain pattern in the third direction.

A field effect transistor includes a plurality of horizontal channels spaced apart from each other in a second direction perpendicular to a substrate between a source electrode and a drain electrode spaced apart from each other in a first direction. A vertical channel connecting two horizontal channels adjacent to each other in the second direction is in at least one vertical gap between adjacent horizontal channels. The vertical channel extends in the first direction between the source electrode and the drain electrode. A first gate electrode faces the plurality of horizontal channels and the vertical channel. A gate insulating layer insulates the first gate electrode from the source electrode, the drain electrode, the plurality of horizontal channels, and the vertical channel. The plurality of horizontal channels and the vertical channel each independently include a two-dimensional (2D) semiconductor material.

A semiconductor device may include a first insulating layer and a channel formation layer on the first insulating layer, where the channel formation layer may include a two-dimensional semiconductor material. The channel formation layer may include an active semiconductor layer and an inactive semiconductor layer. The active semiconductor layer may be bonded to an upper surface of the first insulating layer with a first adhesion energy. The inactive semiconductor layer may be laterally bonded to the active semiconductor layer and may include an element included in the active semiconductor layer. In addition, the inactive semiconductor layer may be bonded to the upper surface of the first insulating layer with a second adhesion energy. The second adhesion energy may be greater than the first adhesion energy.