H10N30/10513

RF acoustic wave resonators integrated with high electron mobility transistors including a shared piezoelectric/buffer layer and methods of forming the same
11581866 · 2023-02-14 · ·

An RF integrated circuit device can includes a substrate and a High Electron Mobility Transistor (HEMT) device on the substrate including a ScAlN layer configured to provide a buffer layer of the HEMT device to confine formation of a 2DEG channel region of the HEMT device. An RF piezoelectric resonator device can be on the substrate including the ScAlN layer sandwiched between a top electrode and a bottom electrode of the RF piezoelectric resonator device to provide a piezoelectric resonator for the RF piezoelectric resonator device.

MEMS COMPONENT HAVING A HIGH INTEGRATION DENSITY
20180013055 · 2018-01-11 ·

A MEMS component having increased integration density and a method for manufacturing such a component are specified. The component comprises a base wafer and a cover wafer arranged over this. A first cavity is arranged between the base wafer and the cover wafer. A second cavity is arranged over the cover wafer, below a thin-layer covering. The cavities contain component structures.

MOVABLE PIEZO ELEMENT AND METHOD FOR PRODUCING A MOVABLE PIEZO ELEMENT
20230013976 · 2023-01-19 ·

A movable piezo element and to a method for producing the element are provided. The movable piezo element may have a structured substrate, in which an intermediate layer is arranged between a first substrate layer and a second substrate layer. The element may also have a first electrode layer. The element may also have a second electrode layer arranged on the ferroelectric, piezoelectric, or flexoelectric layer. The second substrate layer may be structured such that at least one bar of the second substrate layer is formed. The bar may be clamped on one side and may be physically spaced from the first substrate layer. A surface of the bar facing away from the first substrate layer, and/or a lateral surface of the bar, may be at least partly covered by another layer.

SEMICONDUCTOR SUBSTRATE WITH OXIDE SINGLE CRYSTAL HETEROSTRUCTURES, MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE USING THE SAME

A semiconductor substrate with oxide single crystal heterostructures, to which a sacrificial layer, an epitaxy functional oxide thin film having a perovskite structure and a metal layer are grown on an oxide single crystal substrate, prepared another metal layer on a semiconductor substrate, and bonded the metal layer of the oxide single crystal substrate to the metal layer of the semiconductor substrate to be face each other, and separated the oxide single crystal substrate by selectively etching and removing only the sacrificial layer after the bonding.

METHOD FOR MANUFACTURING DEVICE COMPRISING HALIDE PEROVSKITE ACTIVE LAYER, AND POWER GENERATION DEVICES

A power generation device manufacturing method and a power generation device are proposed. In one embodiment, the method includes (a) forming a halide perovskite active layer on a flexible substrate bent by a stress applied thereto and (b) releasing the stress applied to the substrate on which the halide perovskite active layer is formed, thereby unfolding the bent substrate. By applying a strain to the active layer of the power generation device and controlling the same, using the method described above, it is possible to improve the performance of the power generation device without changing the composition of the active layer or the configuration of the device.

Piezoelectric film, piezoelectric module, and method of manufacturing piezoelectric film

A piezoelectric film includes a substrate having flexibility, and at least two piezoelectric elements provided to the substrate so as to be arranged at intervals of a first dimension along a first direction, the piezoelectric elements are each configured by stacking a first electrode film, a piezoelectric film made of an inorganic material, and a second electrode film along a thickness direction of the substrate, and an area between the piezoelectric elements adjacent to each other along the first direction forms a vibrational region which can be displaced in the thickness direction.

INTEGRATED HEATER (AND RELATED METHOD) TO RECOVER DEGRADED PIEZOELECTRIC DEVICE PERFORMANCE

In some embodiments, a piezoelectric device is provided. The piezoelectric device includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A heating element is disposed over the semiconductor substrate. The heating element is configured to heat the piezoelectric structure to a recovery temperature for a period of time, where heating the piezoelectric structure to the recovery temperature for the period of time improves a degraded electrical property of the piezoelectric device.

N-POLAR RARE-EARTH III-NITRIDE BULK ACOUSTIC WAVE RESONATOR
20230055905 · 2023-02-23 ·

A bulk acoustic wave (BAW) resonator includes a piezoelectric layer oriented so that an N-polar surface forms a frontside surface that faces away from the substrate while a metal-polar surface forms the backside surface and faces toward the substrate. A process for the manufacture of a bulk acoustic wave (BAW) resonator includes orienting a piezoelectric layer on a substrate so that an N-polar surface forms a frontside surface that faces away from the substrate while a metal-polar surface forms the backside surface and faces toward the substrate; etching a via though the backside of the substrate to the metal-polar surface of the piezoelectric layer; and removing etch residue from a sidewall of the resonator cavity.

Piezoelectric element, and resonator using piezoelectric element

A piezoelectric element that includes a substrate, a lower electrode layer on the substrate, an intermediate layer on the lower electrode layer, and an upper electrode layer on the intermediate layer. The intermediate layer includes a first piezoelectric layer including an aluminum nitride as a main component thereof and located between the lower electrode layer and the upper electrode layer, a first buffer layer including an aluminum nitride as a main component and located between the first piezoelectric layer and the upper electrode layer, a first intermediate electrode layer located between the first buffer layer and the upper electrode layer, and a second piezoelectric layer located between the first intermediate electrode layer and the upper electrode layer.

PIEZOELECTRIC LAMINATE AND PIEZOELECTRIC ELEMENT
20230095101 · 2023-03-30 · ·

A piezoelectric laminate and a piezoelectric element have, on a substrate in the following order, a lower electrode layer, and a piezoelectric film containing a perovskite-type oxide. The lower electrode layer includes a first layer arranged in a state of being in contact with the substrate and includes a second layer arranged in a state of being in contact with the piezoelectric film, the first layer contains Ti or TiW as a main component, the second layer is a uniaxial alignment film which contains Ir as a main component and in which the Ir is aligned in a (111) plane, and a half width at half maximum of an X-ray diffraction peak from the (111) plane is 0.3° or more.