H01L27/26

NEURON AND NEUROMORPHIC SYSTEM INCLUDING THE SAME

The present invention discloses a neuron and a neuromorphic system including the same. The neuron according to an embodiment of the present invention includes a metal insulator metal (MIM) device including a metal ion-doped insulating layer and configured to perform integration and fire, and the MIM device is formed to have a negative differential resistance (NDR) region in which current decreases as voltage increases.

NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE BASED ON FAST DIFFUSIVE METAL ATOMS

A negative differential resistance (NDR) device for non-volatile memory cells in crossbar arrays is provided. Each non-volatile memory cell is situated at a crosspoint of the array. Each non-volatile memory cell comprises a switching layer in series with an NDR material containing fast diffusive atoms that are electrochemically inactive. The switching layer is positioned between two elec-trodes.

METAL-INSULATOR-SEMICONDUCTOR-INSULATOR-METAL (MISIM) DEVICE, METHOD OF OPERATION, AND MEMORY DEVICE INCLUDING THE SAME
20210288110 · 2021-09-16 ·

A metal-insulator-semiconductor-insulator-metal (MISIM) device includes a semiconductor layer, an insulating layer disposed over an upper surface of the semiconductor layer, a back electrode disposed over a lower surface of the semiconductor layer opposing the upper surface, and first and second electrodes disposed over the insulating layer and spaced-apart from each other.

Metal-insulator-semiconductor-insulator-metal (MISIM) device, method of operation, and memory device including the same

A metal-insulator-semiconductor-insulator-metal (MISIM) device includes a semiconductor layer, an insulating layer disposed over an upper surface of the semiconductor layer, a back electrode disposed over a lower surface of the semiconductor layer opposing the upper surface, and first and second electrodes disposed over the insulating layer and spaced-apart from each other.

Uplink measurements for wireless systems

A method for measuring channel quality in a wireless transceiver is disclosed, comprising: receiving, at a wireless transceiver, an analog signal from a user equipment (UE); converting the analog signal to a plurality of digital samples at an analog to digital converter (ADC); performing a fast Fourier transform (FFT) on the plurality of digital samples to generate frequency domain samples; identifying an uplink demodulation reference signal (DMRS) symbol; performing channel estimation on the DMRS symbol to identify an estimate of channels; creating a noise covariance matrix from the estimate of channels; and deriving an interference measure from the noise covariance matrix.

Scalable, stackable, and BEOL-process compatible integrated neuron circuit
10903277 · 2021-01-26 · ·

An integrated neuron circuit structure comprising at least one thin-film resistor, one Metal Insulator Metal capacitor and one Negative Differential Resistance device.

Resource configuration method and apparatus

A resource configuration method and an apparatus are provided. The resource configuration method includes: receiving, by user equipment, configuration information sent by a network device, where the configuration information is used to indicate at least one time interval and at least one time-frequency resource unit within the time interval, and the time-frequency resource unit includes a first time-frequency resource subunit and/or a second time-frequency resource subunit; and reconfiguring, by the user equipment, a resource mapping manner and/or a rate matching manner based on the configuration information, so that no downlink receiving or uplink sending is performed by the user equipment on the first time-frequency resource subunit, and adjusting a timing offset of the second time-frequency resource subunit to perform downlink receiving or uplink sending on the second time-frequency resource subunit obtained by adjusting the timing offset. Resource utilization can be improved while ensuring that the user equipment correctly receives data.

METAL-INSULATOR-SEMICONDUCTOR-INSULATOR-METAL (MISIM) DEVICE, METHOD OF OPERATION, AND MEMORY DEVICE INCLUDING THE SAME
20200135809 · 2020-04-30 ·

A metal-insulator-semiconductor-insulator-metal (MISIM) device includes a semiconductor layer, an insulating layer disposed over an upper surface of the semiconductor layer, a back electrode disposed over a lower surface of the semiconductor layer opposing the upper surface, and first and second electrodes disposed over the insulating layer and spaced-apart from each other.

SCALABLE, STACKABLE, AND BEOL-PROCESS COMPATIBLE INTEGRATED NEURON CIRCUIT
20200111840 · 2020-04-09 · ·

An integrated neuron circuit structure comprising at least one thin-film resistor, one Metal Insulator Metal capacitor and one Negative Differential Resistance device.

Scalable and low-voltage electroforming-free nanoscale vanadium dioxide threshold switch devices and relaxation oscillators with current controlled negative differential resistance

A vanadium dioxide (VO.sub.2)-based threshold switch device exhibiting current-controlled negative differential resistance (S-type NDR), an electrical oscillator circuit based on the threshold switch device, a wafer including a plurality of said devices, and a method of manufacturing said device are provided. The VO.sub.2-based threshold switch device exhibits volatile resistance switching and current-controlled negative differential resistance from the first time a sweeping voltage or voltage pulse is applied across the device without being treated with an electroforming process. Furthermore, the device exhibits substantially identical switching characteristics over at least 10.sup.3 switching operations between a high resistance state (HRS) and a low resistance state (LRS), and a plurality of threshold switch devices exhibits a threshold voltage V.sub.T spreading of less than about 25%. The threshold switch device may be included in an oscillator circuit to produce an astable oscillator that may serve as a functional building block in spiking-neuron based neuromorphic computing.