A semiconductor system includes a substrate. The substrate has a front side and a back side. A device is formed on the front side of the substrate. A vertical spring is etched in the substrate about the device. A trench is etched in the front side of the substrate about the device. A wall of the trench forms a side of the vertical spring.

The present disclosure relates to a wafer level chip scale package (WLCSP) with a stress absorbing cap substrate. The cap substrate is bonded to a die through a bond ring and a bond pad arranged on an upper surface of the cap substrate. A through substrate via (TSV) extends from the bond pad, through the cap substrate, to a lower surface of the cap substrate. Further, recesses in the upper surface extend around the bond pad and along sidewalls of the bond ring. The recesses absorb induced stress, thereby mitigating any device offset in the die.

A MEMS device is formed by applying a lower polymer film to top surfaces of a common substrate containing a plurality of MEMS devices, and patterning the lower polymer film to form a headspace wall surrounding components of each MEMS device. Subsequently an upper polymer dry film is applied to top surfaces of the headspace walls and patterned to form headspace caps which isolate the components of each MEMS device. Subsequently, the MEMS devices are singulated to provide separate MEMS devices.

A method for producing sensor devices includes generating a semiconductor wafer having a plurality of sensor chips, wherein each sensor chip comprises a micro-electromechanical systems (MEMS) structure arranged at a main surface of the semiconductor wafer; forming a plurality of gas-permeable covers over the main surface of the semiconductor wafer, wherein each gas-permeable cover covers a corresponding MEMS structure of the MEMS structures and forms a cavity above the corresponding MEMS structure; and singulating the semiconductor wafer into a plurality of sensor devices.

A device is provided that includes a handle layer with at least one cavity and suspension structure, a patterned polycrystalline silicon (poly-Si) first device layer, where at least one structural element is suspended by the structure, and may include a seismic element. A second electrically insulating layer is present, followed by a second device layer of patterned single-crystal silicon (mono-Si) with at least one moveably suspended seismic element above the first layer. A cap layer finalizes the structure, with the handle layer, device layers, and the cap layer forming an enclosure's walls. The first and second insulating layers bond the handle and device layers. The enclosure includes at least one seismic element from the second device layer, and at least one static and moveable electrode for motion detection or causation, with the static electrode in the first device layer.

The microintegrated sensor comprises a stack formed by a sensor layer, of semiconductor material, by a cap layer, of semiconductor material, and by an insulating layer. The sensor layer and the cap layer have a respective peripheral portion surrounding a central portion, and the insulating layer extends between the peripheral portions of the sensor layer and of the cap layer. An air gap extends between the central portions of the sensor layer and of the protection layer. A through trench extends into the central portion of the sensor layer as far as the air gap and surrounds a platform housing a sensitive element. The cap layer has through holes in the insulating layer that extend from the air gap and form a fluidic path with the air gap and the through trench.

A method for manufacturing a micromechanical component including a substrate and including a cap, which is connected to the substrate and, together with the substrate, encloses a first cavity, a first pressure prevailing and a first gas mixture having a first chemical composition being enclosed in the first cavity. An access opening connecting the first cavity to surroundings of the micromechanical component is formed in the substrate or in the cap. The first pressure and/or the first chemical composition is adjusted in the first cavity. The access opening is sealed by introducing energy or heat via laser into an absorbing part of the substrate or the cap. During the step for forming the access opening, a first access opening section is formed generally perpendicularly to a surface of the substrate or the cap, and a second access opening section is formed generally perpendicularly to and in parallel to the surface.

A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.

An integrated device includes: a first die; a second die coupled in a stacked way on the first die along a vertical axis; a coupling region arranged between facing surfaces of the first die and of the second die, which face one another along the vertical axis and lie in a horizontal plane orthogonal to the vertical axis, for mechanical coupling of the first and second dies; electrical-contact elements carried by the facing surfaces of the first and second dies, aligned in pairs along the vertical axis; and conductive regions arranged between the pairs of electrical-contact elements carried by the facing surfaces of the first and second dies, for their electrical coupling. Supporting elements are arranged at the facing surface of at least one of the first and second dies and elastically support respective electrical-contact elements.

A method and structure for a PLCSP (Package Level Chip Scale Package) MEMS package. The method includes providing a MEMS chip having a CMOS substrate and a MEMS cap housing at least a MEMS device disposed upon the CMOS substrate. The MEMS chip is flipped and oriented on a packaging substrate such that the MEMS cap is disposed above a thinner region of the packaging substrate and the CMOS substrate is bonding to the packaging substrate at a thicker region, wherein bonding regions on each of the substrates are coupled. The device is sawed to form a package-level chip scale MEMS package.