Provided are a hole forming method and a hole forming apparatus capable of stably forming a single nanopore on a membrane. This hole forming method is a hole forming method for forming a hole in a film and includes: a first step of applying a first voltage between a first electrode and a second electrode, installed so as to sandwich the film provided in an electrolyte, and stopping the application of the first voltage when a current flowing between the first electrode and the second electrode reaches a first threshold current so as to form a thin film portion in a part of the film; and a second step of applying a second voltage between the first electrode and the second electrode after the first step so as to form a nanopore in the thin film portion.

Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays thereof. In one aspect, methods for manufacturing nanopores and arrays thereof exploit a physical seam. One or more etch pits are formed in a topside of a substrate and one or more trenches, which align with the one or more etch pits, are formed in a backside of the substrate. An opening is formed between the one or more etch pits and the one or more trenches. A dielectric material is then formed over the substrate to fill the opening. Contacts are then disposed on the topside and the backside of the substrate and a voltage is applied from the topside to the backside, or vice versa, through the dielectric material to form a nanopore. In another aspect, the nanopore is formed at or near the center of the opening at a seam, which is formed in the dielectric material.

Provided is a technique for stably forming a single nanopore by dielectric breakdown for a membrane having a high dielectric breakdown withstand voltage. In the nanopore forming method of the present disclosure, a SiNx film is placed between the first aqueous solution and the second aqueous solution, the first electrode is brought into contact with the first aqueous solution, and the second electrode is brought into contact with the second aqueous solution, and a voltage is applied to the first electrode and the second electrode. The SiNx film has a composition ratio of 1<x<4/3. At least any one of the first aqueous solution and the second aqueous solution has the pH of 10 or more.

A method of providing a MEMS device including a through-hole in a layer of structural material using a multitude of MEMS method steps. A versatile method to create a through-hole, in particular a multitude thereof, involves a step of exposing a polymeric layer of positive photoresist in a direction from the outer surface of the positive photoresist to light resulting in an exposed layer of positive photoresist including relatively strongly depolymerized positive photoresist in the top section of a recess while leaving relatively less strongly depolymerized positive photoresist in the bottom section of the recess.

A process for fabricating a device for detecting electromagnetic radiation includes the step of providing a detecting element suspended by a supporting pillar. The pillar has a lateral through-aperture formed via a local break in the continuity of a layer of interest, because of the presence of a jut in a vertical orifice.

An ejection head chip and method for a fluid ejection device and a method for reducing a silicon shelf width between a fluid supply via and a fluid ejector stack. The ejection head chip includes a silicon substrate and a fluid ejector stack deposited on the silicon substrate, wherein at least one metal layer of the fluid ejector stack is isolated from a fluid supply via etched in the ejection head chip by an encapsulating material.

Techniques regarding microfluidic chips with one or more vias filled with sacrificial plugs and/or manufacturing methods thereof are provided herein. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a silicon device layer of a microfluidic chip comprising a plurality of vias extending through the silicon device layer. The plurality of vias comprise greater than or equal to about 100 vias per square centimeter of a surface of the silicon device layer and less than or equal to about 100,000 vias per square centimeter of the surface of the silicon device layer. Additionally, the apparatus can comprise a plurality of sacrificial plugs positioned in the plurality of vias.

Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays thereof. In one aspect, methods for manufacturing nanopores and arrays thereof exploit a physical seam. One or more etch pits are formed in a topside of a substrate and one or more trenches, which align with the one or more etch pits, are formed in a backside of the substrate. An opening is formed between the one or more etch pits and the one or more trenches. A dielectric material is then formed over the substrate to fill the opening. Contacts are then disposed on the topside and the backside of the substrate and a voltage is applied from the topside to the backside, or vice versa, through the dielectric material to form a nanopore. In another aspect, the nanopore is formed at or near the center of the opening at a seam, which is formed in the dielectric material.

Embodiments of the present disclosure provide methods of forming solid state dual pore sensors which may be used for biopolymer sequencing and dual pore sensors formed therefrom. In one embodiment, a method of forming a dual pore sensor includes providing a pattern in a surface of a substrate. Generally, the pattern features two fluid reservoirs separated by a divider wall. The method further includes depositing a layer of sacrificial material into the two fluid reservoirs, depositing a membrane layer, patterning two nanopores through the membrane layer, removing the sacrificial material from the two fluid reservoirs, and patterning one or more fluid ports and a common chamber.

An ejection head chip and method for a fluid ejection device and a method for reducing a silicon shelf width between a fluid supply via and a fluid ejector stack. The ejection head chip includes a silicon substrate and a fluid ejector stack deposited on the silicon substrate, wherein at least one metal layer of the fluid ejector stack is isolated from a fluid supply via etched in the ejection head chip by an encapsulating material.