In one embodiment, a ruggedized wafer level microelectromechanical (“MEMS”) force sensor includes a base and a cap. The MEMS force sensor includes a flexible membrane and a sensing element. The sensing element is electrically connected to integrated complementary metal-oxide-semiconductor (“CMOS”) circuitry provided on the same substrate as the sensing element. The CMOS circuitry can be configured to amplify, digitize, calibrate, store, and/or communicate force values through electrical terminals to external circuitry.

A micro electromechanical system (MEMS) device includes a MEMS section attached to a substrate, and a cap bonded to a first surface of the substrate. The MEMS device further includes a carrier bonded to a second surface of the substrate opposite the first surface, wherein the carrier is free of active devices, and the cap and the carrier define a vacuum region surrounding the MEMS section. The MEMS device further includes a bond pad on a surface of the carrier opposite the MEMS section, wherein the bond pad is electrically connected to the MEMS section.

This application relates to an integrated circuit die (200) comprising a MEMS transducer structure (101) integrated with associated electronic circuitry (102). The electronic circuitry comprises a plurality of transistors and associated interconnections and is formed in a first area (103) of the die from a first plurality (104) of layers, e.g. formed by CMOS metal (107) and dielectric (108) layers and possibly doped areas (106) of substrate (105). The MEMS transducer structure is formed in a second area (111) of the die and is formed, at least partly, from a second plurality (112) of layers which are separate to the first plurality of layers. At least one filter circuit (201) is formed from said second plurality of layers overlying the plurality of transistors of the electronic circuitry (102). The second plurality of layers comprise at least a first metal layer (115, 117) which is patterned to form a first electrode of the MEMS transducer and at least a resistor, capacitor electrode or inductor element (203a, 203b) of the filter circuit.

A CMOS-MEMS resonant transducer and a method for fabricating the same are disclosed, which provide the CMOS-MEMS resonant transducer having narrow gaps(<500 nm) with high yield by etching a well-defined free-free beam structure, furthermore, the TiN layers disposed at the bottom of the resonant body may efficiently reduce the frequency drift due to electrostatic charges. The method for fabricating the CMOS-MEMS resonant transducer is also adapted to the processes of CMOS-MEMS platform with various scales, which provides routing and MEMS design flexibility.

A MEMS transducer package (300) comprises a package cover (313) comprising a first bonding region (316) and an integrated circuit die (319) comprising a second bonding region (314) for bonding with the first bonding region of the package cover. The integrated circuit die (309) comprises an integrated MEMS transducer (311) and integrated electronic circuitry (312) in electrical connection with the integrated MEMS transducer. The footprint of the integrated electronic circuitry (312) at least overlaps the bonding region (314) of the integrated circuit die (309).

A display device having a MEMS transmissive light valve and a method for forming the same are provided. The method includes: providing a multilayer semiconductor substrate comprising a bottom semiconductor layer, a middle buried layer and a top semiconductor layer; forming a light guide opening in the top semiconductor layer; forming at least one MOS device in a remaining part of the top semiconductor layer; forming an interconnection layer and an interlayer dielectric layer on the at least one MOS; forming a MEMS transmissive light valve, which is electrically connected to the interconnection layer, on the light guide opening, where the MEMS transmissive light valve is surrounded by the interlayer dielectric layer; forming a transparent backplane on a top surface of the interlayer dielectric layer; and removing the bottom semiconductor layer.

First reinforcement stripes are formed on a process surface of a base substrate. A first epitaxial layer covering the first reinforcement stripes is formed on the first process surface. Second reinforcement stripes are formed on the first epitaxial layer. A second epitaxial layer covering the second reinforcement stripes is formed on exposed portions of the first epitaxial layer. Semiconducting portions of transistor cells are formed in or portions of micro electromechanical structures are formed from the second epitaxial layer.

A microelectromechanical system structure and a method for fabricating the same are provided. A method for fabricating a MEMS structure includes the following steps. A first substrate is provided, wherein a transistor, a first dielectric layer and an interconnection structure are formed thereon. A second substrate is provided, wherein a second dielectric layer and a thermal stability layer are formed on the second substrate. The first substrate is bonded to the second substrate, and the second substrate removed. A conductive layer is formed within the second dielectric layer and electrically connected to the interconnection structure. The thermal stability layer is located between the conductive layer and the interconnection structure. A growth temperature of a material of the thermal stability layer is higher than a growth temperature of a material of the conductive layer and a growth temperature of a material of the interconnection structure.

An electronic device includes a plurality of CMOS control elements arranged in a two-dimensional array, where each CMOS control element of the plurality of CMOS control elements includes semiconductor devices. The plurality of CMOS control elements each including a PMOS semiconductor device portion comprising a high voltage PMOS device and a low voltage PMOS device and an NMOS semiconductor device portion comprising a high voltage NMOS device and a low voltage NMOS device. The plurality of CMOS control elements are arranged in the two-dimensional array such that the PMOS semiconductor device portion of a CMOS control element of the plurality of CMOS control elements is only adjacent to other PMOS semiconductor device portions of adjacent CMOS control elements of the plurality of CMOS control elements, and such that the NMOS semiconductor device portion of a CMOS control element of the plurality of CMOS control elements is only adjacent to other NMOS semiconductor device portions of adjacent CMOS control elements of the plurality of CMOS control elements.

Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.