The present disclosure relates to a method for fabricating a micro-electromechanical system (MEMS) device. In the method, a carrier wafer is received. A MEMS wafer, which includes a plurality of die, is bonded to the carrier wafer. A cavity is formed to separate an upper surface of the carrier wafer from a lower surface of a die of the MEMS wafer. A separation trench is formed to laterally surround the die, wherein formation of the cavity and the separation trench leaves a tethering structure suspending the die over the upper surface of the carrier wafer. The die and carrier wafer are translated with respect to one another to break the tethering structure and separate the die from the carrier wafer.

Alignment features formed on a cover substrate allow for a second substrate to be bonded to the cover substrate while ensuring that the second substrate is not titled with respect to a plane defined by the alignment features. Die attachment material is patterned such that it deforms or flows underneath the second substrate while allowing corners of the second substrate to rest on landing areas that are elevated above the top surface of the cover substrate. Some of the landing areas may include additional features that are elevated above the landing areas to form notches which constrain the rotational position of the second in addition to its tilt.

An alignment recess formed in a cover substrate such as a cover for a MEMS device allows a second substrate to be bonded to the cover substrate. The alignment recess is larger than the second substrate and has two corner regions diagonally opposite each other where a wall of the recess protrudes to form a notch. The notch is dimensioned such that when the second substrate is disposed within the recess with two opposing corners surrounded by respective notches of the recess, the angular position of the second substrate relative to the cover substrate can be controlled to within a desired amount of rotation.

Wafer level proximity sensors are formed by processing a silicon substrate wafer and a silicon cap wafer separately, bonding the cap wafer to the substrate wafer to form a bonded wafer sandwich, and then selectively thinning the silicon substrate wafer and silicon cap wafer. The silicon substrate wafer is thinned first, and an interconnect structure of through-silicon vias is formed within the thinned silicon substrate wafer. The silicon cap wafer is then thinned to expose openings facing an area of the thinned silicon substrate wafer where a photosensitive region is location and facing an area of the thinned silicon substrate wafer where an emitter die is to be installed. After emitter die installation, the openings in the thinned silicon cap wafer are filled with a transparent material. The thinned silicon cap wafer further includes an opaque light barrier to block light transmission between the openings.

A wafer seal ring may be formed on a first and/or a second wafer. One or both of the first and/or second wafers may have one or more dies formed thereon. The wafer seal ring may be formed to surround the dies of a corresponding wafer. One or more die seal rings may be formed around the one or more dies. The wafer seal ring may be formed to a height that may be approximately equal to a height of one or more die seal rings formed on the first and/or second wafer. The wafer seal ring may be formed to provide for eutectic or fusion bonding processes. The first and second wafers may be bonded together to form a seal ring structure between the first and second wafers. The seal ring structure may provide a hermetic seal between the first and second wafers.

Measures are provided for improving and simplifying metallic bonding processes which enable a reliable initiation of the bonding process and thus contribute to a uniform bonding. The present method provides a further option for using bonding layers. The method in the case of which the two semiconductor elements are bonded to one another via a bond of at least one metallic starting layer and at least one further starting layer provides that the two starting layers are structured in such a way that the layer areas which are assigned to one another have differently sized areal extents. Moreover, the layer thicknesses of the two starting layers should be selected in such a way that the layer areas which are assigned to one another meet the material ratio necessary for the bonding process.

A multi-wafer structure is formed by forming a cavity in a cap wafer and forming a first seal material around the cavity. A collapsible standoff structure is formed around the cavity. A movable mass is formed in a device wafer. A second seal material is formed around the movable mass. The first seal material and the second seal material are of materials that are able to form a eutectic bond at a eutectic temperature. The cap wafer and the device wafer are arranged so that the first and second seals are aligned but separated by the collapsible standoff structure. Gas is evacuated from the cavity at a temperature above the eutectic temperature using a low pressure. The temperature is lowered, the cap and device wafer are pressed together, and the temperature is raised above the eutectic temperature to form a eutectic bond with the first and second seal materials.

A MEMS micro-mirror assembly (250, 300, 270, 400) comprising, a MEMS device (240) which comprises a MEMS die (241) and a magnet (231); a flexible PCB board (205) to which the MEMS device (240) is mechanically, and electrically, connected; wherein the flexible PCB board (205) further comprises a first extension portion (205b) which comprises a least one electrical contact (259a,b) which is useable to electrically connect the MEMS micro-mirror assembly (250, 300, 270, 400) to another electrical component). There is further provided a projection system comprising such a MEMS micro-mirror assembly (250, 300, 270, 400).

According to at least one embodiment, methods of fabricating micro electro-mechanical systems (MEMS) structures involving lamination of an electromechanical layer to a micromechanical structure are disclosed.

Certain embodiments of the present disclosure relate to a sensor assembly including a substrate, a housing, and a sensor die. In certain embodiments, the substrate includes an outer region, an inner region, and a middle region between the outer region and the inner region. In certain embodiments, the substrate includes electrical contact pads on at least the inner region. In certain embodiments, the housing is coupled to the substrate at the middle region or the outer region to provide a hermetic seal. In certain embodiments, the sensor die is coupled to the substrate at the inner region via the electrical contact pads. The sensor die is aligned to the substrate via aligning features that align the sensor die relative to the substrate in at least one of a first plane or a second plane.