A method for forming a semiconductor structure includes following operations. A first substrate including a first side, a second side opposite to the first side, and a metallic pad disposed over the first side is received. A dielectric structure including a first trench directly above the metallic pad is formed. A second trench is formed in the dielectric structure and a portion of the first substrate. A sacrificial layer is formed to fill the first trench and the second trench. A third trench is formed directly above the metallic pad. A barrier ring and a bonding structure are formed in the third trench. A bonding layer is disposed to bond the first substrate to a second substrate. A portion of the second side of the first substrate is removed to expose the sacrificial layer. The sacrificial layer is removed by an etchant.

A method of manufacturing three-dimensional thin-film nitinol (NiTi) devices includes: depositing multiple layers of nitinol and sacrificial material on a substrate. A three-dimensional thin-film nitinol device may include a first layer of nitinol and a second layer of nitinol bonded to the first layer at an area masked and not covered by the sacrificial material during deposition of the second layer.

A method of manufacturing a semiconductor structure includes providing a first substrate, disposing and patterning a plate over the first substrate, disposing a first sacrificial oxide layer over the plate, forming a plurality of recesses over a surface of the first sacrificial oxide layer, disposing and patterning a membrane over the first sacrificial oxide layer, disposing a second sacrificial oxide layer to surround the membrane and cover the first sacrificial oxide layer; and forming a plurality of conductive plugs passing through the plate or the membrane, wherein the plate includes a semiconductive member and a tensile member, and the semiconductive member is disposed within the tensile member.

Systems, devices, and methods for micro-electro-mechanical system (MEMS) tunable capacitors can include a fixed actuation electrode attached to a substrate, a fixed capacitive electrode attached to the substrate, and a movable component positioned above the substrate and movable with respect to the fixed actuation electrode and the fixed capacitive electrode. The movable component can include a movable actuation electrode positioned above the fixed actuation electrode and a movable capacitive electrode positioned above the fixed capacitive electrode. At least a portion of the movable capacitive electrode can be spaced apart from the fixed capacitive electrode by a first gap, and the movable actuation electrode can be spaced apart from the fixed actuation electrode by a second gap that is larger than the first gap.

Embodiments of the invention include a sensing device that includes a base structure having a proof mass that is positioned in proximity to a cavity of an organic substrate, a piezoelectric material in contact with a first electrode of the base structure, and a second electrode in contact with the piezoelectric material. The proof mass deflects in response to application of an external force or acceleration and this deflection causes a stress in the piezoelectric material which generates a voltage differential between the first and second electrodes.

A semiconductor structure includes a first substrate, a metallic pad disposed over the first substrate, a dielectric structure disposed over the first substrate and exposing a portion of the metallic pad, a bonding structure disposed over and electrically connected to the metallic pad, a barrier ring surrounding the bonding structure, and a through-hole penetrating the first substrate and the dielectric structure. The bonding structure includes a bottom and a sidewall, the bottom of the bonding structure is in contact with the metallic pad, a first portion of the sidewall of the bonding structure is in contact with the dielectric structure, and a second portion of the sidewall of the bonding structure is in contact with the barrier ring.

A method for producing thin MEMS wafers including: (A) providing an SOI wafer having an upper silicon layer, a first SiO2 layer and a lower silicon layer, the first SiO2 layer being situated between the upper silicon layer and the lower silicon layer, (B) producing a second SiO2 layer on the upper silicon layer, (C) producing a MEMS structure on the second SiO2 layer, (D) introducing clearances into the lower silicon layer down to the first SiO2 layer, (E) etching the first SiO2 layer and thus removing the lower silicon layer.

A method of forming a Micro-Electro-Mechanical System (MEMS) includes forming a lower electrode on a first insulator layer within a cavity of the MEMS. The method further includes forming an upper electrode over another insulator material on top of the lower electrode which is at least partially in contact with the lower electrode. The forming of the lower electrode and the upper electrode includes adjusting a metal volume of the lower electrode and the upper electrode to modify beam bending.

In accordance with various embodiments, a method for processing a layer structure is provided, where the layer structure includes a first layer, a sacrificial layer arranged above the first layer, and a second layer arranged above the sacrificial layer, where the second layer includes at least one opening, and the at least one opening extends from a first side of the second layer as far as the sacrificial layer. The method includes forming a liner layer covering at least one inner wall of the at least one opening; forming a cover layer above the liner layer, where the cover layer extends at least in sections into the at least one opening; and wet-chemically etching the cover layer, the liner layer and the sacrificial layer using an etching solution, where the etching solution has a greater etching rate for the liner layer than for the cover layer.

In accordance with various embodiments, a method for processing a layer structure is provided, where the layer structure includes a first layer, a sacrificial layer arranged above the first layer, and a second layer arranged above the sacrificial layer, where the second layer includes at least one opening, and the at least one opening extends from a first side of the second layer as far as the sacrificial layer. The method includes forming a liner layer covering at least one inner wall of the at least one opening; forming a cover layer above the liner layer, where the cover layer extends at least in sections into the at least one opening; and wet-chemically etching the cover layer, the liner layer and the sacrificial layer using an etching solution, where the etching solution has a greater etching rate for the liner layer than for the cover layer.