H10P14/69391

Composite substrate and preparation method thereof, and semiconductor device structure
12538766 · 2026-01-27 · ·

A composite substrate includes a substrate, a high-resistance layer located on the substrate, the high-resistance layer comprising a first low-temperature aluminum nitride (AlN) layer, a high-temperature AlN layer and a second low-temperature AlN layer which are stacked in sequence, and a growth substrate located on a side, away from the substrate, of the high-resistance layer. Under the action of the first low-temperature AlN layer, a tensile stress on the high-temperature AlN layer may be reduced, to reduce a dislocation, and further improve a crystal quality of the high-temperature AlN layer and ensure resistivity of the high-temperature AlN layer; and an element of Al in the high-temperature AlN layer is prevented from diffusing into the growth substrate, to protect the crystal quality of the high-temperature AlN layer and improve a bonding effect between the high-resistance layer and the growth substrate. Thus, stability and reliability of the composite substrate are greatly improved.

SELECTIVE PASSIVATION AND SELECTIVE DEPOSITION

Methods for selective deposition are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. An inhibitor, such as a polyimide layer, is selectively formed from vapor phase reactants on the first surface relative to the second surface. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the first surface. The first surface can be metallic while the second surface is dielectric. Accordingly, material, such as a dielectric transition metal oxides and nitrides, can be selectively deposited on metallic surfaces relative dielectric surfaces using techniques described herein.

METHODS FOR FILLING RECESSED FEATURES ON A SUBSTRATE WITH A FLOWABLE LAYER STRUCTURE
20260060013 · 2026-02-26 ·

Methods for filling a recessed feature on a substrate are disclosed. The methods disclosed include depositing a flowable layer structure on the substrate and heating the flowable layer structure above the glass transition temperature of the flowable layer structure. Methods for depositing the flowable layer structure include depositing an aluminum oxide based flowable layer structure employing atomic layer deposition processes.

Sidewall spacer structure to increase switching performance of ferroelectric memory device

Various embodiments of the present disclosure are directed towards an integrated chip including a switching layer over a semiconductor substrate. The switching layer comprises a first metal oxide. An upper conductive structure overlies the switching layer. The switching layer is spaced between opposing sidewalls of the upper conductive structure. A first dielectric layer is disposed along opposing sidewalls of the switching layer. The first dielectric layer comprises a second metal oxide different from the first metal oxide. A top surface of the switching layer and a top surface of the first dielectric layer directly underlie a bottom surface of the upper conductive structure.

Semiconductor device and manufacturing method thereof

A semiconductor device with a small variation in characteristics is provided. In a manufacturing method of a semiconductor device including a capacitor with reduced leak current, a first conductor is formed; a second insulator is formed over the first conductor; a third insulator is formed over the second insulator; a second conductor is formed over the third insulator; a fourth insulator is deposited over the second conductor and the third insulator; by heat treatment, hydrogen contained in the third insulator diffuses into or is absorbed by the second insulator; the first conductor is one electrode of the capacitor; the second conductor is the other electrode of the capacitor; and each of the second insulator and the third insulator is a dielectric of the capacitor.

Semiconductor device and method for manufacturing same

A method for manufacturing a semiconductor device is provided. The method includes the following. A substrate is provided. A stacked structure is formed on the substrate. The stacked structure includes first material layers and gate layers that are alternatively stacked. The stacked structure includes a giant block (GB) region and a stair-step region. A third material layer is formed on an upper surface of the GB region and an upper surface of the stair-step region. A fourth material layer filling the stair-step region and covering the GB region is formed. At least one contact structure is located in the stair-step region. Each of the at least one contact structure penetrates the third material layer and is connected with a respective one of the gate layers.

Semiconductor device and method for manufacturing semiconductor device

A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes an oxide semiconductor film, a source electrode and a drain electrode over the oxide semiconductor film, an interlayer insulating film placed to cover the oxide semiconductor film, the source electrode, and the drain electrode, a first gate insulating film over the oxide semiconductor film, a second gate insulating film over the first gate insulating film, and a gate electrode over the second gate insulating film. The interlayer insulating film has an opening overlapping with a region between the source electrode and the drain electrode, the first gate insulating film, the second gate insulating film, and the gate electrode are placed in the opening of the interlayer insulating film, the first gate insulating film includes oxygen and aluminum, and the first gate insulating film includes a region thinner that is than the second gate insulating film.

Low-temperature deposition of high-quality aluminum nitride films for heat spreading applications

Provided are high quality metal-nitride, such as aluminum nitride (AlN), films for heat dissipation and heat spreading applications, methods of preparing the same, and deposition of high thermal conductivity heat spreading layers for use in RF devices such as power amplifiers, high electron mobility transistors, etc. Aspects of the inventive concept can be used to enable heterogeneously integrated compound semiconductor on silicon devices or can be used in in non-RF applications as the power densities of these highly scaled microelectronic devices continues to increase.

Atomic layer deposition and vapor deposition reactor with in-chamber microplasma source

An in-chamber plasma source in a deposition reactor system includes an array of microcavity or microchannel plasma devices having a first electrode and a second electrode isolated from plasma in microcavities or microchannels. An inlet provides connection to deposition precursor. A region interacts deposition precursor with plasma. An outlet directs precursor dissociated with the plasma onto a substrate for deposition. A reactor system includes a substrate holder across from the outlet, a chamber enclosing the in-chamber plasma source and the substrate holder, an exhaust from the chamber, and conduit supplying precursors from sources or bubblers to the inlet. A reactor system can conduct plasma enhanced atomic layer deposition at high pressures and is capable of forming a complete layer in a single cycle.

METHOD, SYSTEM AND APPARATUS FOR FORMING AN OXIDE LAYER

A method for depositing an oxide on a substrate, comprising: a) providing the substrate in a chamber; b) initially pulsing a precursor into the chamber to chemisorb a constituent onto a surface of the substrate; c) pulsing an oxygen species into the chamber to form an oxide layer on the surface upon contact with the constituent, wherein the oxygen species comprises an alcohol; and repeating one or more steps b)-c) until the oxide layer is deposited to a desired thickness.