There is provided a technique that includes forming a film on at least one substrate by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: (a) performing a first set a number of times, the first set including non-simultaneously performing: supplying a precursor to the at least one substrate from at least one first ejecting hole of a first nozzle arranged along a substrate arrangement direction of a substrate arrangement region where the at least one substrate is arranged; and supplying a reactant to the at least one substrate; and (b) performing a second set a number of times, the second set including non-simultaneously performing: supplying the precursor to the at least one substrate from at least one second ejecting hole of a second nozzle arranged along the substrate arrangement direction of the substrate arrangement region; and supplying the reactant to the at least one substrate.

A method for performing a feedback sequence for patterning CD control. The method including performing a series of process steps on a wafer to obtain a plurality of features, wherein a process step is performed under a process condition. The method including measuring a dimension of the plurality of features after performing the series of process steps. The method including determining a difference between the dimension that is measured and a target dimension for the plurality of features. The method including modifying the process condition for the process step based on the difference and a sensitivity factor for the plurality of features relating change in dimension and change in process condition.

A method of processing a substrate is provided. The substrate includes an etching target region and a patterned region. The patterned region is provided on the etching target region. In the method, an organic film is formed on a surface of the substrate. Subsequently, the etching target region is etched by plasma generated from a processing gas. The organic film is formed in a state that the substrate is placed in a processing space within a chamber. When the organic film is formed, a first gas containing a first organic compound is supplied toward the substrate, and then, a second gas containing a second organic compound is supplied toward the substrate. An organic compound constituting the organic film is generated by polymerization of the first organic compound and the second organic compound.

A substrate processing apparatus includes: a chamber; and a processing gas supply unit connected to the chamber via a processing gas supply flow path and configured to supply a processing gas. The processing gas supply unit includes a raw material cartridge that includes a raw material tank that accommodates a porous member containing a metal-organic framework adsorbed with gas molecules of a raw material of the processing gas; a main body configured to communicate the raw material tank and the processing gas supply flow path with each other when the raw material cartridge is attached; and a desorption mechanism configured to desorb the gas molecules of the raw material of the processing gas and allow the gas molecules to flow out as the processing gas to the processing gas supply flow path while the raw material cartridge is attached to the main body.

A method of manufacturing a semiconductor device includes forming an interfacial layer over a channel region and forming a metal-containing layer over the interfacial layer. A metal silicate layer is formed over the channel region after forming the metal-containing layer. A portion of the metal silicate layer is removed. A gate dielectric layer is formed over the channel region after removing the portion of the metal silicate layer, and a gate electrode layer is formed over the gate dielectric layer.

A method for thermal management of semiconductor devices provides a semiconductor material. A beryllium oxide (BeO) layer is epitaxially grown over the semiconductor material. A polycrystalline diamond coating is deposited over the BeO layer.

Disclosed herein are memory cells and memory arrays, as well as related methods and devices. For example, in some embodiments, a memory device may include: a support having a surface; and a three-dimensional array of memory cells on the surface of the support, wherein individual memory cells include a transistor and a capacitor, and a channel of the transistor in an individual memory cell is oriented parallel to the surface.

A transistor device includes a semiconductor structure, a multi-layer passivation stack on the semiconductor structure, source and drain contacts on the semiconductor structure, and a gate on the semiconductor structure between the source and drain contacts. The multi-layer passivation stack includes a plurality of passivation layers having different electrical properties, and at least one opening extending through the passivation layers. The at least one opening exposes a surface of the semiconductor structure between the gate and the source or drain contact.

A process can be implemented to form adjacent transistors separated by a shallow trench isolation (STI), where the STI is formed after forming gates and sources/drains of the transistors. The STI can be formed by an active area cut using a mask to form a rectangular opening for filling with a STI dielectric. Using an active area mask providing a rectangular-like shape after forming gate stacks and source/drains, a memory device can be constructed having transistors separated by a STI having a recess from active areas of the transistors by at most 50 nm.

A semiconductor device structure and methods of forming the same are described. In some embodiments, the method includes forming a dielectric layer, which includes forming an as deposited layer using an atomic layer deposition process, which includes flowing a silicon source precursor into a process chamber at a first flow rate, flowing a carbon and nitrogen source precursor into the process chamber at a second flow rate, and flowing an oxygen source precursor into the process chamber at a third flow rate. A ratio of the first flow rate to the second flow rate to the third flow rate ranges between about one to one to eight and one to one to twelve, and the as deposited layer has a carbon concentration substantially greater than a nitrogen concentration. The method further includes annealing the as deposited layer in an environment including H.sub.2O to form the dielectric layer.